Buffer Chain Transition-Time Control for Stable Ramped Current
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Solution Overview
Problem
Existing methods for generating ramped current signals in regenerative receivers are limited by noise and reduced linearity, especially at low supply voltages, and are dependent on uncontrolled PVT conditions, leading to unstable trigger timing and parasitic characteristics.
Innovation Solution
An electronic circuit with a chain of buffers, each equipped with a buffer current source and capacitor, controlled by an oscillator and a control circuit, adjusts transition times using an oscillating reference signal, calibrated by a dichotomy engine and digital-to-analog converter, to stabilize the ramp time and reduce PVT dependencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a voltage-to-current converter is used to generate ramped current signal, then the ramped current signal can be generated, but additional noise and reduced linearity occur, especially at low supply voltages
Solution Approach 1:
The patent removes the voltage-to-current converter from the system entirely. Instead of converting voltage to current, the invention directly generates ramped current signals through a chain of current sources that are sequentially activated by buffered trigger signals, thereby eliminating the noise and linearity issues associated with voltage-to-current conversion
Solution Approach 2:
The patent replaces the analog voltage-to-current conversion mechanism with a digital-controlled current source activation system. A time-to-digital converter measures the ramp duration and controls the sequential activation of current sources through digital logic, substituting analog conversion with a digital control approach that avoids noise and linearity degradation
2Adaptability or versatility
If self-controlled trigger signal is used for sequencing operations, then operations can be performed without clock signal, but conversion time and parasitic characteristics become directly dependent on PVT conditions
Solution Approach 1:
The patent introduces a feedback mechanism where the time-to-digital converter measures the actual ramp duration and feeds this information back to control the activation timing of subsequent current sources. This closed-loop feedback ensures that trigger timing remains stable and consistent across varying PVT conditions, preventing drift and ensuring reliable operation
Solution Approach 2:
The patent dynamically adjusts the activation timing parameters of the current sources based on measured PVT conditions. The time-to-digital converter monitors the actual ramp characteristics and modifies the trigger signal timing parameters accordingly, compensating for PVT variations and maintaining stable operation without requiring a clock signal
3Reliability
If chain of buffers with discrete current sources is used, then ramped current signal can be generated, but trigger timing becomes dependent on control chain trigger time and not a priori stable
Solution Approach 1:
The patent applies preliminary calibration to establish stable trigger timing characteristics before actual operation. The system measures the propagation delays through the buffer chain under various conditions and pre-computes compensation values that are stored and applied during operation, ensuring stable timing without requiring continuous adjustment
Solution Approach 2:
The patent dynamically adjusts buffer propagation delay parameters based on measured timing characteristics. By monitoring the actual trigger propagation time through the buffer chain and modifying buffer operating parameters accordingly, the system maintains stable trigger timing despite variations in PVT conditions or signal characteristics
Data Source
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AI summary
In one aspect the present invention relates to an electronic circuit (100) comprising: - a chain (12) of buffers (40, 40', 40"), wherein each buffer (40) comprises a buffer input (45), a buffer output (46), a buffer current source (44) and a buffer capacitor (43) and wherein a transition time of each buffer (40, 40', 40") is controllable by the buffer current source (44, 44', 44"), - an oscillator (70, 71, 72) configured to generate an oscillating reference signal, and - a control circuit (80) coupled to the oscillator (70, 71, 72) and coupled to the buffer current sources (44, 44', 44") of the buffers (40, 40', 40") and operable to adjust the transition time of each buffer (40, 40', 40") on the basis of the oscillating reference signal.