Buffer Circuit Bandwidth Enhancement Voltage Regulator
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Solution Overview
Problem
Voltage regulators face challenges in enhancing bandwidth while maintaining stability, as existing methods like spike coupling and bandwidth increasing often result in output oscillations and reduced stability due to increased electromagnetic interference and decreased phase margin.
Innovation Solution
A buffer circuit comprising a first transistor, a second transistor, a feed-forward circuit, and a resistive bias circuit is introduced, which includes a feed-forward path to generate a zero in the frequency response, enhancing phase margin and stability, and is implemented as a source follower to control the power transistor of a voltage regulator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If bandwidth increasing method is used to improve response speed, then operation speed is improved, but phase margin decreases and stability is reduced
Solution Approach 1:
The voltage regulator system is segmented into multiple functional blocks: operational amplifier, buffer circuit, power transistor, and voltage divider. The buffer circuit is further segmented into first and second transistors with distinct functions. This segmentation allows independent optimization of each block's bandwidth and stability characteristics, resolving the contradiction between overall speed and phase margin.
Solution Approach 2:
A buffer circuit is introduced as an intermediary component between the operational amplifier and the power transistor. This buffer circuit acts as a mediator that isolates the high-gain operational amplifier from the power transistor's capacitance effects, allowing the system to achieve high bandwidth without sacrificing the phase margin of the main feedback loop.
2Reliability
If spike coupling method is used to reduce voltage drop, then voltage recovery is improved, but output oscillation and electromagnetic interference occur
Solution Approach 1:
The patent implements a feedback mechanism where the voltage divider feeds back a portion of the output voltage to the operational amplifier's inverting input. This negative feedback loop continuously monitors and corrects voltage drops, providing reliable voltage recovery without the need for aggressive spike coupling that causes oscillations and EMI.
3Stability of the object's composition
If off-chip capacitor is used to stabilize output voltage, then voltage stability is improved, but area occupation increases and system cost increases
Solution Approach 1:
The patent extracts the voltage stabilization function from the external off-chip capacitor and implements it internally using the voltage divider network and the operational amplifier's feedback mechanism. This eliminates the need for large external capacitors, reducing board area and system cost while maintaining output voltage stability.
Solution Approach 2:
The voltage regulator circuit is designed to be self-regulating through its internal feedback mechanism. The operational amplifier continuously adjusts the power transistor's gate voltage based on the feedback from the voltage divider, enabling the circuit to maintain stable output voltage without relying on large external energy storage capacitors.
Data Source
AI summary
A buffer circuit includes a first transistor, a second transistor, a feed-forward circuit and a resistive bias circuit. The first transistor has a first terminal, a second terminal and a third terminal, wherein the first terminal of the first transistor is served as an input terminal of the buffer circuit. The second transistor has a first terminal and a second terminal, wherein the second terminal of the second transistor is coupled to the third terminal of the first transistor and served as an output terminal of the buffer circuit. The feed-forward circuit has a first terminal and a second terminal respectively coupled to the first terminal of the second transistor and the second terminal of the first transistor. The resistive bias circuit has a first terminal and a second terminal respectively coupled to the second terminal of the first transistor and the first terminal of the feed-forward circuit.