Buffer Circuit Output Driver Layout for Impedance Adjustment
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Solution Overview
Problem
Existing semiconductor devices with parallel output drivers face issues in impedance adjustment, leading to fluctuations in fan-out, propagation delays, and increased current consumption due to the need for dummy gate capacities to align fan-outs.
Innovation Solution
The semiconductor device employs a ZQ selector configuration with AND gate circuits and reduced dummy gate capacities, allowing for impedance adjustment without increasing current consumption by optimizing the number of output drivers and their control signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If dummy gate capacities are added to align fan-outs of output drivers, then fan-out consistency is improved, but current consumption increases
Solution Approach 1:
The patent removes dummy gate capacities from the circuit configuration. By extracting these unnecessary capacitive elements, the invention eliminates the source of increased current consumption while maintaining fan-out alignment through alternative means (proper sizing of actual output drivers).
Solution Approach 2:
The invention changes the design parameters of output drivers by properly sizing their transistor widths and gate capacities to achieve desired fan-out values without relying on dummy gate capacities. This parameter optimization allows fan-out consistency to be achieved through the drivers themselves rather than adding external dummy elements.
2Measurement precision
If multiple output drivers are connected in parallel for impedance adjustment, then impedance control precision is improved, but device complexity increases
Solution Approach 1:
The patent divides the output driver function into multiple parallel driver units, each capable of independent impedance adjustment. This segmentation allows fine-grained impedance control by selectively activating specific drivers based on impedance code, achieving precise impedance matching without requiring a single complex driver circuit.
Solution Approach 2:
The invention implements dynamic selection of output drivers based on impedance requirements. By using control logic that activates specific drivers according to impedance codes, the system dynamically adapts the output impedance to match various loading conditions, achieving precise control while keeping the circuit structure relatively simple.
Data Source
AI summary
A device includes a power supply line, an output terminal, a circuit configured to perform a logic operation on a first signal and a second signal to produce a third signal, first, second and third transistors. The first transistor is coupled between the power supply line and the output terminal and includes a control gate supplied with the third signal. The second and third transistors are coupled in series between the power supply line and the output terminal. The second transistor includes a control gate supplied with the first signal and the third transistor includes a control gate supplied with a fourth signal that is different from each of the first, second and third signals.