Buffer Control Logic for High-Priority Transaction Handling
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Solution Overview
Problem
Current data processing systems for slave devices struggle with handling high-priority transactions and changing data direction due to the constraints of a single FIFO buffer, leading to delays and increased complexity when dealing with larger page unit sizes and complex operations in flash technology.
Innovation Solution
Implementing a buffer storage with buffer control logic that operates in a normal FIFO mode but switches to an alternative mode for high-priority transactions, allowing data packets to be output out of temporal order, thereby prioritizing high-priority transactions without increasing the controller's size or complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single FIFO buffer structure is used in the controller, then the controller structure is kept small and simplified, but high priority transactions cannot be processed quickly and data direction cannot be changed until the FIFO is empty
Solution Approach 1:
The buffer storage is divided into two distinct portions: a first portion for buffering data packets of normal priority transactions and a second portion for buffering data packets of high priority transactions. This segmentation allows independent processing of normal and high priority transactions, enabling the controller to quickly handle high priority transactions without waiting for the entire FIFO buffer to be processed, thus resolving the contradiction between maintaining simple controller structure and reducing transaction processing delay.
2Device complexity
If a single FIFO buffer is used to maintain temporal order of data packets, then the buffer structure remains simple, but latency for high priority transactions increases as they must wait until reaching the head of the FIFO
Solution Approach 1:
The buffer storage is segmented into a first portion for normal priority transactions and a second portion for high priority transactions. This allows high priority transactions to be stored in the second portion and processed independently from normal priority transactions in the first portion, eliminating the latency issue where high priority transactions had to wait until reaching the head of a single FIFO buffer, while maintaining overall buffer structure simplicity.
Solution Approach 2:
The buffer control logic dynamically switches between different buffering modes based on transaction priority. When a high priority transaction is detected, the system transitions from single-FIFO mode to dual-portion mode, allowing high priority transactions to bypass the normal FIFO queueing mechanism and be processed immediately, thus reducing latency without permanently increasing structural complexity.
3Ease of manufacture
If data packets are buffered in a single FIFO storage, then the controller remains cost-effective, but the inability to handle transactions differently causes unacceptable delays in complex flash operations
Solution Approach 1:
The buffer storage is divided into a first portion for normal priority transactions and a second portion for high priority transactions. This segmentation enables the controller to handle complex flash operations with different priority levels efficiently, improving transaction handling speed for critical operations while maintaining the cost-effectiveness of a single buffer structure rather than requiring multiple separate buffers or complex hardware modifications.
Data Source
AI summary
A data processing apparatus and method are provided for handling transactions issued to a slave device from a master device. Each transaction involves the transfer of one or more data packets between the master device and the slave device. The data processing apparatus comprises a buffer storage operable to buffer the data packets of one or more transactions during transfer of those data packets between the master and slave devices, and buffer control logic is used to control the operation of the buffer storage. In a normal mode of operation the buffer control logic causes the buffer storage to operate as a FIFO storage for buffering the data packets so as to maintain the temporal order of those data packets. However, upon receipt of a high priority transaction, the buffer control logic causes the buffer storage to operate in an alternative mode of operation in which an allocated portion of the buffer storage is reserved for buffering data packets associated with that high priority transaction, whilst the remaining portion of the buffer storage is retained for buffering of the data packets of other transactions. By this approach, when the buffer storage is operating in the alternative mode of operation data packets in the allocated portion may be output from the buffer storage out of temporal order with respect to data packets in the remaining portion, thus facilitating quicker handling of the high priority transaction than would otherwise be possible.