Buffer Controller Clock Synchronization via Arbitrator Module
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Solution Overview
Problem
Buffer controllers used in mass data processing face compatibility issues due to asynchronous clocks among their elements, leading to decreased data correctness during data transmission between hosts and flash memory.
Innovation Solution
A buffer managing method and controller that synchronizes operations by using an arbitrator module to coordinate clocks among master units and a slave unit, employing a starvation-preventing algorithm to prevent resource access delays, and utilizing status arrays to manage memory segment access states, ensuring synchronous operations and preventing data corruption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different interfaces and drivers with asynchronous clocks are used in the buffer controller, then compatibility with different operating systems is improved, but data correctness deteriorates due to asynchronous clock operations
Solution Approach 1:
The patent introduces a buffer controller as an intermediary device between the host and flash memory, which includes a buffer memory and control logic. This intermediary synchronizes data transfer operations between components operating at different clock speeds, preventing data corruption while maintaining compatibility with various operating systems through multiple interface drivers.
Solution Approach 2:
The buffer controller is segmented into distinct functional modules: interface drivers for different operating systems, a buffer memory region for temporary data storage, and control logic for synchronization. This segmentation allows each module to operate independently at its optimal clock speed while the control logic coordinates them to maintain data correctness.
2Productivity
If multiple master units access the buffer simultaneously, then data processing throughput is improved, but resource access fairness deteriorates leading to starvation
Solution Approach 1:
The arbitration module performs preliminary actions by pre-establishing access priorities and allocating buffer resources to master units before conflicts occur. It uses a starvation-preventing algorithm that proactively ensures each master unit receives fair access opportunities, preventing any single unit from monopolizing the buffer while maintaining high throughput.
Solution Approach 2:
The arbitration module implements a feedback mechanism that monitors the access patterns and buffer utilization by multiple master units. Based on this feedback, it dynamically adjusts arbitration decisions to prevent starvation of any master unit while maximizing overall data processing throughput, ensuring fair resource distribution.
Data Source
AI summary
By assigning a slave unit and at least one master unit in a buffer controller, clocks of the at least one master unit can be unified with a clock of the slave unit. A buffer status array is assigned for the slave unit in a buffer, and either a range status array or a queue status array is assigned for the master unit in the buffer for performing operations of the buffer controller in an accessing-by-block manner or in an accessing-by-spaced-interval manner. The master unit cooperated with the slave unit is determined from the at least one master unit by using a starvation-preventing algorithm.