Programmable Buffer Current Source for Variable Load Modes

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Solution Overview

Problem

Legacy reference buffer circuitry faces inefficiencies due to oversized current sources that must handle a wide range of load currents, leading to power wastage and voltage glitches caused by varying transistor gate voltages.

Innovation Solution

A buffer amplifier arrangement featuring a programmable variable current source that adapts to different load configurations and modulator modes, ensuring optimal current supply and minimizing power inefficiencies and voltage glitches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a fixed current source is sized for maximum output load current, then the circuit can handle all load conditions, but power is wasted in sub-optimal modes

Engineering Contradiction:
Improveload current handling capabilityVSAvoidpower wastage
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent applies dynamics by replacing the fixed current source with a programmable current source that can dynamically adjust its output current based on the actual load requirements. The current source transitions from a static, fixed-value component to a dynamic, adjustable component that responds to changing operational modes and load conditions, thereby eliminating power waste while maintaining adaptability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements parameter changes by making the current source value programmable and adjustable. Instead of a fixed current parameter, the system can change the current parameter dynamically based on operational modes and load demands. This allows the current source to optimize its output parameter (current magnitude) to match actual requirements, avoiding the energy waste associated with oversized fixed current sources.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If a PMOS device supplies variable load current, then power efficiency improves, but high frequency power supply noise couples to output

Engineering Contradiction:
Improvepower efficiencyVSAvoidpower supply noise coupling
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary buffer stage between the PMOS variable current source and the output. This buffer acts as a mediator that isolates the noise-prone PMOS switching node from the sensitive output node. The buffer amplifier absorbs and filters the high-frequency noise generated by PMOS switching while maintaining the efficient variable current supply function, thus resolving the noise coupling issue without sacrificing power efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If transistor gate voltages vary with load current, then current matching is achieved, but voltage glitches and output instability occur

Engineering Contradiction:
Improvecurrent matching accuracyVSAvoidoutput voltage stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent applies beforehand cushioning by implementing a buffer amplifier stage that anticipates and prevents voltage glitches before they reach the output. The buffer is designed with proper compensation and filtering to cushion against the harmful effects of gate voltage variations and chopping transitions. This preemptive approach maintains current matching accuracy while protecting output stability by absorbing transient disturbances.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The buffer amplifier serves as an intermediary that decouples the relationship between varying gate voltages and output voltage. It allows the transistors to operate with varying gate voltages for accurate current matching while the buffer mediates to provide a stable, glitch-free output. The intermediary buffer transfers only the necessary signal while filtering out harmful voltage variations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250044820A1Buffer circuit
Publication Date: 2025.02.06 ANALOG DEVICES INT UNLTD CO
  • US20250044820A1 patent drawing
  • US20250044820A1 patent drawing
  • US20250044820A1 patent drawing

AI summary

The present disclosure provides a buffer amplifier arrangement that seeks to find a solution to varying load configurations, output modes, modulator modes etc on an output of the buffer and the corresponding varying currents or voltages that appear at transistor devices throughout the circuit. To address this issue a current source that supplies an output of the buffer is divided into a fixed current source which supplies the current for the transistors of the buffer, and a variable current source that provides current for the variable load. The variable current source is a programmable current source that can be varied based on the associated modulator mode bus.