Buffer Device Address Space Security Control

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Solution Overview

Problem

Conventional computers and electronic devices lack effective data security measures, making them vulnerable to unauthorized access and data tampering due to the increasing interconnectedness of network devices.

Innovation Solution

A buffer device with a central buffer module and data buffer module is introduced, which detects and generates security signals based on predefined address spaces, comparing data to reference data to restrict or allow access, thereby preventing unauthorized data exchange between the memory module and the memory interface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data access control is implemented in conventional computers, then data security is improved, but device complexity increases

Engineering Contradiction:
Improvedata securityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer device integrates multiple functional modules (central buffer module, data buffer module, comparison module, control module) within a single nested structure that interfaces between the memory module and memory interface. This nesting approach consolidates security control functions into one unit, improving data security while minimizing the increase in overall system complexity.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The buffer device acts as an intermediary component positioned between the memory module and memory interface. It mediates data access by comparing destination addresses against reference data and controlling data exchange accordingly. This intermediary role enables security control without requiring complex modifications to the existing memory system architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If address space detection and data comparison are performed for every access, then data security is improved, but processing speed decreases

Engineering Contradiction:
Improvedata securityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

Reference data corresponding to predefined address spaces is pre-stored in the central buffer module before data access operations occur. When a data access request is made, the buffer device quickly compares the destination address against this pre-prepared reference data, avoiding the need for complex real-time analysis and speeding up the security verification process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The buffer device performs address space detection and data comparison only for accesses to predefined address spaces, not for all memory accesses. The control module determines whether security control is needed based on the destination address, applying partial action only where necessary. This selective approach maintains data security for critical areas while preserving processing speed for other operations.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If reference data is stored and compared for security verification, then data security is improved, but memory usage increases

Engineering Contradiction:
Improvedata securityVSAvoidmemory usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Reference data is stored specifically in the central buffer module of the buffer device, separate from the main memory module. This localized storage approach ensures that only the necessary reference data for security verification is kept in the buffer, minimizing the impact on overall memory usage while maintaining security functionality.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9836415B2Buffer device, method and apparatus for controlling access to internal memory
Publication Date: 2017.12.05 MONTAGE TECHNOLOGY CO LTD
  • US9836415B2 patent drawing
  • US9836415B2 patent drawing
  • US9836415B2 patent drawing

AI summary

The application discloses a buffer device and a method for controlling data access to an internal memory. The buffer device has a central buffer module coupled to a memory interface to receive a command/address signal via a command/address channel. The central buffer module is configured to detect whether a destination address of the received command/address signal is within a predefined address space, and generate a security read/write signal when the command/address signal is within the predefined address space. The buffer device further has a data buffer module coupled between the memory interface and a memory module to buffer data therebetween. The data buffer module is configured to store reference data, compare the buffered data with the reference data in response to the security read/write signal, and determine whether or not to restrict exchange of the buffered data between the memory module and the memory interface.