Bidirectional Buffer Circuit With Hardware-Locked Data Direction
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Solution Overview
Problem
Existing bidirectional data exchange circuits in digital electronic cards, such as those used in railway signaling, face challenges in securely fixing the data transfer direction after an initial writing phase, with manual jumper solutions being tedious and programmable component solutions risking software failures.
Innovation Solution
A bidirectional data exchange circuit using a logic gate connected to the transfer direction input of a buffer, with inputs connected to reference potentials via resistors, ensuring the direction is fixed independently of the direction control signal, utilizing discrete passive elements like AND or OR gates and resistors to maintain a predetermined state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a programmable component is used to control the direction signal, then the control is flexible and programmable, but the system is vulnerable to software failures compromising operational safety
Solution Approach 1:
The patent introduces an intermediary circuit between the programmable component and the buffer direction control. This intermediary circuit translates the programmable component's output into a form that controls the buffer direction, creating a separation that protects the critical safety function from software failures while maintaining programmable flexibility.
2Reliability
If a flip-flop is used to control the direction signal independently of software, then operational safety is improved, but the device complexity increases due to managing new component types
Solution Approach 1:
The patent extracts the critical safety function of direction control from the programmable component and implements it using a dedicated hardware circuit with resistors and logic gates. This separation removes the vulnerability to software failures while maintaining manageable complexity through standardized components.
3Reliability
If manual jumpers are used to control the direction signal, then the control is simple and reliable, but the operation becomes tedious and time-consuming
Solution Approach 1:
The patent implements a self-configuring circuit that automatically determines and locks the data transfer direction based on initial conditions, eliminating the need for manual jumper configuration. The circuit self-services the direction control function, maintaining reliability while dramatically improving ease of operation.
4Ease of manufacture
If discrete passive elements like logic gates and resistors are used to fix the direction, then the cost is reduced and reliability is improved, but the initial setup requires precise configuration
Solution Approach 1:
The patent incorporates preliminary action by designing the circuit to automatically establish the correct direction state upon initial power-up or activation. The resistors and logic gates are pre-configured to self-determine the appropriate data transfer direction, eliminating the need for precise manual configuration during assembly while maintaining cost-effectiveness.
Data Source
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AI summary
The bidirectional data exchange circuit (10) comprises: - a buffer (16) having: - a first and a second set of paired terminals (A1... A8, B1... B8); - a transfer direction input (20); - a transfer direction control input (42); - a logic gate (50) of which: - the output is connected to the transfer direction input (20); - one input is connected to the transfer direction control input (42), this input being further connected to a first reference potential (Vcc) by a resistor (52); and - the other input is connected to a terminal (A1) of the buffer (16) and to the first reference potential (Vcc) by a resistor (54; 154); - the terminal (B1) of the buffer (16) paired with the terminal (A1) of the buffer to which the other input of the logic gate (50) is connected is connected to a second reference potential by a resistor (56).The order of the first and second reference potentials and the nature of the logic gate (50) are such that, after a first direction command of the buffer transfer in one direction, the matched terminals (A1) force the logic gate (50) into a predetermined state independent of the value of the signal on the direction command input (42).