Semiconductor Buffer Doping Profile for Reverse Recovery Stability
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Solution Overview
Problem
Conventional semiconductor devices experience oscillation during reverse recovery operations due to high doping concentrations at specific peaks, leading to inefficient carrier depletion and voltage/current waveform oscillations.
Innovation Solution
A semiconductor device with a bulk donor substrate featuring a first buffer region with controlled doping and hydrogen concentration peaks, where the doping concentration at the shallowest peak is 50 times or lower than the bulk donor concentration, and a trench portion with a critical integral concentration position, preventing carrier depletion and oscillation by managing doping concentrations and hydrogen implantation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high doping concentration is used at the buffer region peak, then carrier depletion is improved, but oscillation occurs during reverse recovery
Solution Approach 1:
The patent changes the doping concentration parameter at the buffer region peak to be 50 times or less than the bulk donor concentration, which suppresses oscillation during reverse recovery while maintaining adequate carrier depletion capability through the controlled doping profile
Solution Approach 2:
The patent creates a localized buffer region with specific doping concentration characteristics (peak concentration 50× bulk or less) at a specific depth position, while other regions maintain their own doping characteristics, allowing localized optimization without compromising overall device performance
2Stability of the object's composition
If doping concentration at shallowest peak is reduced to suppress oscillation, then waveform stability is improved, but carrier depletion capability may be compromised
Solution Approach 1:
The patent optimizes the doping concentration parameter at the shallowest peak to be 50 times or less than bulk donor concentration, achieving a balance that suppresses oscillation while maintaining adequate carrier depletion through the overall doping profile design
Solution Approach 2:
The patent designs the doping profile in advance with the peak concentration relationship established before device operation, ensuring both waveform stability and carrier depletion capability are built into the structure from the beginning
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses oscillations during reverse recovery by maintaining lower doping concentrations at critical peaks, ensuring stable voltage and current waveforms, and preventing carrier depletion, thus enhancing the semiconductor device's performance.
Implementation Method 1
a first buffer region of a first conductivity type, the first buffer region being provided on a lower surface side of the semiconductor substrate and having one or more doping concentration peaks
Implementation Method 2
one or more doping concentration peaks and one or more hydrogen concentration peaks in a depth direction of the semiconductor substrate
Data Source
AI summary
Provided is a semiconductor device including: a semiconductor substrate including a bulk donor; and a first buffer region of a first conductivity type, the first buffer region being provided on a lower surface side of the semiconductor substrate and having one or more doping concentration peaks and one or more hydrogen concentration peaks in a depth direction of the semiconductor substrate, in which a doping concentration at a shallowest concentration peak, out of the doping concentration peaks of the first buffer region, closest to the lower surface of the semiconductor substrate is 50 times as high as a concentration of the bulk donor of the semiconductor substrate or lower. The doping concentration at the shallowest concentration peak may be lower than a reference carrier concentration obtained when current that is 1/10 of rated current flows between an upper surface and the lower surface of the semiconductor substrate.