Buffer Circuit Output Driver Selection for Stable Impedance
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Solution Overview
Problem
Existing buffer circuits for semiconductor devices with parallel output drivers face issues with impedance adjustment, leading to fluctuations in fan-out, propagation delays, and increased current consumption due to the need for dummy gate capacities to align fan-outs.
Innovation Solution
The proposed solution involves configuring the ZQ selector and pull-down units with AND gate circuits and dummy gate capacities to align fan-outs, reducing the number of required dummy gate capacities while maintaining consistent impedance adjustments across output drivers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple output drivers are connected in parallel to adjust impedance, then impedance adjustment capability is improved, but fan-out fluctuation occurs
Solution Approach 1:
The patent applies local quality by giving each output driver a specific impedance characteristic and using selective activation based on the required impedance level. The buffer circuit includes multiple output drivers with different impedance values (e.g., strong, medium, weak drivers), and the appropriate driver is selected based on the impedance code to achieve precise impedance matching without affecting fan-out stability.
2Reliability
If dummy gate capacities are added to align fan-outs, then fan-out consistency is improved, but current consumption increases
Solution Approach 1:
The patent extracts and eliminates the need for dummy gate capacities by using a selection mechanism that activates only the required output driver based on the impedance code. Instead of having all drivers active with dummy capacities to balance fan-out, the system selectively enables only the necessary driver, thereby maintaining fan-out consistency while reducing unnecessary current consumption.
3Measurement precision
If multiple output drivers are activated simultaneously, then impedance adjustment precision is improved, but propagation delay increases
Solution Approach 1:
The patent applies dynamics by making the output driver configuration adaptable and changeable based on operating conditions. The buffer circuit dynamically selects which output driver to activate based on the impedance code, allowing the system to optimize between impedance precision and propagation delay depending on the required output impedance level, rather than using a fixed configuration.
4Adaptability or versatility
If impedance adjustment is performed using parallel output drivers, then output impedance control is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the buffer circuit to perform multiple functions through a single selection mechanism. The same buffer circuit structure can accommodate different impedance requirements by simply changing which output driver is activated, rather than requiring separate circuits for each impedance level. This multi-functional approach achieves precise impedance control without proportionally increasing device complexity.
Data Source
AI summary
A device includes a power supply line, an output terminal, a circuit configured to perform a logic operation on a first signal and a second signal to produce a third signal, first, second and third transistors. The first transistor is coupled between the power supply line and the output terminal and includes a control gate supplied with the third signal. The second and third transistors are coupled in series between the power supply line and the output terminal. The second transistor includes a control gate supplied with the first signal and the third transistor includes a control gate supplied with a fourth signal that is different from each of the first, second and third signals.