Dynamic Load Buffer Circuit for Duty Ratio and Bandwidth Control
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Solution Overview
Problem
As operational speeds of semiconductor apparatuses increase, buffer circuits face challenges in maintaining output signal quality due to distorted duty ratios and reduced gain and bandwidth from added load circuits intended to adjust duty ratios.
Innovation Solution
A buffer circuit design that includes first and second input transistors, a load control circuit, and a load circuit, where the load circuit's resistance value is adjusted based on output signals to control duty ratios and phase of output signals, using switching transistors and load resistors to dynamically adjust current paths and resistance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a load circuit is added to adjust duty ratios, then duty ratio control is improved, but gain and bandwidth are reduced
Solution Approach 1:
The patent implements dynamic resistance adjustment in the load circuit by controlling switching transistors to connect or disconnect parallel resistors based on the input signal state. This dynamic reconfiguration allows the load resistance to change during operation, enabling duty ratio correction without permanently degrading bandwidth. The switching action occurs rapidly, maintaining high-frequency response while achieving duty ratio control.
Solution Approach 2:
The patent changes the resistance parameter of the load circuit dynamically based on the input signal conditions. By switching between different resistance values (R1 alone or R1 parallel with R2), the circuit adapts its load characteristics to correct duty ratio distortion without sacrificing the gain-bandwidth product that would result from a fixed high resistance value.
2Manufacturing precision
If switching transistors are used to adjust resistance values, then duty ratio correction is improved, but device complexity increases
Solution Approach 1:
The switching transistors in the load circuit serve multiple functions: they act as duty ratio correction elements by dynamically adjusting resistance, and simultaneously function as signal transmission elements that pass the amplified signal to the output. This multi-functionality reduces the need for separate correction circuitry, thereby limiting the increase in overall device complexity.
Solution Approach 2:
The patent merges the duty ratio correction function with the existing load circuit by integrating switching transistors into the load path. Instead of adding a separate correction circuit, the switching elements are combined with the load resistors to form a unified structure that performs both amplification and duty ratio correction functions.
3Manufacturing precision
If resistance value is dynamically adjusted, then output signal quality is improved, but power consumption increases
Solution Approach 1:
The switching transistors operate in periodic cycles, switching between on and off states synchronized with the input signal period. During each cycle, the transistors are conductive only during the portion of the cycle where duty ratio correction is needed, and non-conductive during other portions. This periodic operation limits average power consumption while maintaining output signal quality through timely resistance adjustment.
Data Source
AI summary
A buffer circuit configured to receive first and second input signals through first and second input transistors coupled to a first power voltage node, output a first output signal through a first output node and a second output signal through a second output node based on the first and second input signals. A load circuit is coupled among the first output node, the second output node, and a second power voltage node and a resistance value is adjusted based on at least one of the first and second output signals.