Buffer Management Method Using Dynamic Unit Allocation

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Solution Overview

Problem

The existing buffer management systems in chip design face inefficiencies due to the fixed size of buffer units, leading to low efficiency when handling commands with varying data volumes, resulting in either prolonged processing times for large data or resource wastage for small data.

Innovation Solution

A buffer management method that utilizes a shared buffer system with a buffer unit pair first state table and a buffer unit pair second state table to dynamically allocate buffer units based on the needs of each command, allowing for single or dual unit allocation in a clock cycle, thereby optimizing resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a buffer unit with a small granularity is used, then the buffer can accommodate small data volumes efficiently, but multiple clock cycles are needed for large data volumes, reducing buffer efficiency

Engineering Contradiction:
Improvebuffer granularity precisionVSAvoidbuffer allocation efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The buffer system is segmented into multiple buffer units of the same size, which are further organized into buffer unit pairs. This segmentation allows the system to handle different data volumes by allocating one or two buffer units accordingly, resolving the contradiction between fine granularity for small data and efficient handling of large data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The buffer allocation mechanism dynamically adjusts the number of buffer units allocated based on the actual data volume requirements. The state tables track whether buffer units are occupied or idle, enabling dynamic allocation of one or two buffer units per command, thus adapting to varying data sizes and improving overall buffer efficiency.

Inventive Principle:
Principle #15Dynamics

2Productivity

If a buffer unit with a large granularity is used, then large data volumes can be handled in one clock cycle, but small data volumes cause waste of buffer resources

Engineering Contradiction:
Improvebuffer allocation speedVSAvoidbuffer resource waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

Instead of using a single large buffer unit for all cases, the system applies local quality by allocating exactly one or two buffer units based on the specific needs of each command. The state tables enable precise tracking and allocation, ensuring that buffer resources are matched to the actual data volume requirements of each local operation.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes the allocation parameter (number of buffer units) based on the data volume requirements. By maintaining state tables that track buffer unit availability and using allocation logic that adjusts the number of units allocated, the system optimizes resource usage while maintaining high allocation speed.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If only one size of buffer unit is used, then buffer management is simplified, but the system cannot adapt to diversification and complication of chip command processing

Engineering Contradiction:
Improvebuffer management complexityVSAvoidcommand processing adaptability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The buffer system achieves universality by using buffer units of the same size for multiple purposes. The same buffer units can be allocated singly or in pairs depending on the command requirements, making the system adaptable to diverse command processing needs while maintaining uniform buffer unit design.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The state tables provide feedback mechanisms that track the occupation status of buffer units. This feedback enables the allocation logic to make informed decisions about whether to allocate one or two buffer units, allowing the system to adapt to different command processing requirements while maintaining manageable complexity through systematic state tracking.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3188028B1Buffer management method and apparatus
Publication Date: 2019.12.04 HUAWEI TECH CO LTD
  • EP3188028B1 patent drawingFigure 1
  • EP3188028B1 patent drawingFigure 2
  • EP3188028B1 patent drawingFigure 3

AI summary

This application relates to a cache management method and apparatus, so as to improve cache efficiency and reduce waste of cache resources. The cache management method provided in this application includes: after receiving a to-be-processed command, determining a quantity of cache units needed by the to-be-processed command; if the quantity of cache units needed by the to-be-processed command is one, searching for, based on a cache unit pair first state table, a pair of cache units in which only one cache unit is idle, and allocating the idle cache unit in the pair of cache units to the to-be-processed command; and if the quantity of cache units needed by the to-be-processed command is two, searching for and allocating, based on a cache unit pair second state table in a clock cycle, a pair of cache units in which two cache units are both idle to the to-be-processed command.