Buffer Electrode Stress Layer for Thin Mini-LED Wafer Warpage
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Solution Overview
Problem
Mini-LED chips face increased warping due to compressive stress during epitaxial growth on Al2O3 substrates, leading to difficulty in laser scribing and reduced yield when thinned.
Innovation Solution
Incorporating a buffer electrode with a tensile stress layer formed by alternately stacking metal layers with varying thermal expansion coefficients between the chip body and external electrode to offset compressive stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the mini-LED wafer is lapped to a thinner thickness, then the miniaturization requirement is met, but the compressive stress becomes more pronounced causing increased warping
Solution Approach 1:
A buffer electrode is introduced as an intermediary layer between the chip body and the external electrode. This buffer electrode includes a tensile stress layer that acts as a mediator to counterbalance the compressive stress in the epitaxial layer, thereby reducing wafer warping while maintaining thin thickness
Solution Approach 2:
The patent changes the stress parameter by introducing a tensile stress layer with opposite stress characteristics to the compressive epitaxial layer. By controlling the thermal expansion coefficient difference and layer thickness, the tensile stress parameter is optimized to offset the compressive stress effectively
2Volume of moving object
If the wafer thickness is reduced, then miniaturization is achieved, but laser scribing difficulty increases due to warping
Solution Approach 1:
The buffer electrode serves as a stress-compensating intermediary that maintains wafer flatness during thinning, thereby facilitating easier laser scribing operations on thinned wafers
3Volume of moving object
If the wafer is thinned, then chip size is reduced, but chip yield decreases due to increased warping
Solution Approach 1:
The buffer electrode with tensile stress layer acts as a stress-compensating intermediary that maintains wafer flatness during thinning, thereby facilitating easier laser scribing operations on thinned wafers
Solution Approach 2:
The patent changes the stress parameter by introducing a tensile stress layer with opposite stress characteristics to the compressive epitaxial layer. By controlling the thermal expansion coefficient difference and layer thickness, the tensile stress parameter is optimized to offset the compressive stress effectively
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces wafer warping and enhances chip yield by effectively releasing stress, improving the manufacturing process of mini-LED chips.
Implementation Method 1
The buffer electrode includes a tensile stress layer, and the tensile stress layer is formed by alternately stacking multiple metal layers with a large thermal expansion coefficient and multiple metal layers with a small thermal expansion coefficient, to offset at least part of a compressive stress in an epitaxial layer of the chip body
Data Source
AI summary
A semiconductor chip includes a chip body, an external electrode, and a buffer electrode formed between the chip body and the external electrode. The buffer electrode includes a tensile stress layer, and the tensile stress layer is formed by alternately stacking multiple metal layers with a large thermal expansion coefficient and multiple metal layers with a small thermal expansion coefficient, to offset at least part of a compressive stress in an epitaxial layer of the chip body. The buffer electrode has a tensile stress system formed by alternately stacking metal layers with a large thermal expansion coefficient and metal layers with a small thermal expansion coefficient, which can offset at least part of the compressive stress within the epitaxial layer of the chip body, thereby reducing the warping degree of the thinned wafer and improving the chip yield.