Buffer Circuit Feedback Topology for Wide Dynamic Range
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Solution Overview
Problem
Existing buffer circuits, such as the flipped voltage follower circuit, are limited by a narrow dynamic range and contribute to increased circuit area and power consumption, making them unsuitable for applications requiring wide dynamic ranges, such as ramp signal source follower circuits in imaging devices.
Innovation Solution
A buffer circuit design incorporating first and second capacitors in feedback circuits with transistors and current sources to maintain low output impedance while achieving a wide dynamic range, reducing area, and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a flipped voltage follower circuit is used to achieve low output impedance, then output impedance is improved, but dynamic range is limited
Solution Approach 1:
The buffer circuit is divided into multiple functional blocks: a first common-source amplifier circuit (Q1, Q2) for signal amplification, a second common-source amplifier circuit (Q3, Q4) for additional gain, and a third common-source amplifier circuit (Q5, Q6) for output buffering. Each block operates within its optimal voltage range, collectively achieving a wide overall dynamic range while maintaining low output impedance through the cascaded configuration.
Solution Approach 2:
The patent extends the voltage operating range by adding vertical stages (another dimension to the circuit architecture). By stacking multiple amplifier circuits in series, each contributing a portion of the total voltage swing, the overall dynamic range is expanded beyond what a single FVF stage can provide, while the final stage maintains the low output impedance characteristic.
2Adaptability or versatility
If a multi-stage common-source amplifier circuit is used to achieve wide dynamic range, then dynamic range is improved, but circuit area increases
Solution Approach 1:
Multiple amplifier functions are merged into a single cascaded circuit structure. The first, second, and third common-source amplifier circuits are combined in series, sharing common power supply lines and control signals. This merging approach achieves wide dynamic range through the cumulative gain of multiple stages while minimizing the total area by eliminating redundant components and optimizing the shared infrastructure.
3Adaptability or versatility
If a multi-stage common-source amplifier circuit is used to achieve wide dynamic range, then dynamic range is improved, but power consumption increases
Solution Approach 1:
The circuit employs dynamic biasing through current mirrors that adapt the operating current of each amplifier stage based on the signal level and required gain. The current mirror circuits (Q7-Q10, Q11-Q14) dynamically adjust the bias current to maintain optimal performance across the wide dynamic range while minimizing power consumption during low-signal conditions, allowing the circuit to consume only the necessary power for the current operating point.
Data Source
AI summary
Provided is a buffer circuit that can realize a wide dynamic range, a reduced area, and a reduced power consumption amount while maintaining low output impedance. The buffer circuit includes a first transistor, a current source, a second transistor, an output terminal, and first and second capacitors. The first transistor has a gate to which an input signal is input. The current source is connected to one terminal of the first transistor. The second transistor is connected to the other terminal of the first transistor. The output terminal is connected to the one terminal or the other terminal of the first transistor. The first and second capacitors are between the current source and the gate of the second transistor. The first transistor, the second transistor, and the first capacitor form a first feedback circuit. The first transistor, the current source, and the second capacitor form a second feedback circuit.