Buffer-FET Threshold Modulation for LDO Transient Response
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Solution Overview
Problem
Low dropout (LDO) linear voltage regulators face challenges in achieving high supply rejection at high frequencies due to limited loop gain, leading to poor performance with respect to high-speed power supply transients, resulting in significant output perturbations.
Innovation Solution
The implementation of a linear voltage regulator circuit that modulates the threshold voltage of a buffer transistor using a low-pass filter, which improves the drive of the pass transistor during power supply transients, reducing output perturbations by coupling the low-pass filter to the input and buffer transistors, and employing a clamp circuit to enhance transient response.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional LDO linear voltage regulator circuit topology is used, then the circuit is simple and easy to manufacture, but the supply rejection at high frequencies is poor due to limited loop gain
Solution Approach 1:
A buffer transistor is introduced as an intermediary component between the error amplifier and the pass transistor. This buffer transistor acts as a mediator that provides additional high-frequency gain to the control loop, improving supply rejection at high frequencies without fundamentally changing the traditional LDO circuit topology. The buffer transistor receives the error signal and drives the pass transistor gate, effectively extending the loop gain bandwidth.
Solution Approach 2:
The threshold voltage of the buffer transistor is dynamically modulated by coupling a low-pass filter to its body terminal. This parameter change allows the buffer transistor's characteristics to be adjusted in response to transient conditions, optimizing its performance for high-frequency supply rejection. The low-pass filter modifies the body voltage, which in turn modulates the threshold voltage to improve transient response.
2Reliability
If the loop gain is increased to improve supply rejection, then the transient response improves, but the quiescent current consumption increases
Solution Approach 1:
The buffer transistor's threshold voltage is made dynamic through coupling a low-pass filter to its body terminal. This dynamic adjustment allows the buffer transistor to optimize its operating characteristics in real-time, providing high gain during transients while consuming minimal quiescent current during steady-state operation. The low-pass filter time constant is designed to differentiate between transient and steady-state conditions.
Solution Approach 2:
The low-pass filter coupled to the buffer transistor body terminal creates a time-dependent response that effectively acts periodically - responding strongly to rapid changes (transients) while maintaining low current consumption during stable periods. This time-variant behavior allows the circuit to achieve high transient response performance without proportionally increasing quiescent current.
3Reliability
If a buffer transistor is added to improve high-frequency response, then the supply rejection improves, but the device area increases
Solution Approach 1:
The buffer transistor is strategically positioned in the control loop between the error amplifier and pass transistor, where it provides the most effective high-frequency gain enhancement. This localized placement maximizes the area efficiency by concentrating the additional component only where it provides the greatest performance benefit - in the high-frequency response path - rather than uniformly increasing circuit area throughout.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly reduces output transients, providing improved power supply transient response, area efficiency, and eliminating quiescent current consumption, resulting in better performance compared to traditional LDO regulators.
Implementation Method 1
The low-pass filter circuit is coupled to the input terminal and the buffer transistor, and is configured to modulate a threshold voltage of the buffer transistor responsive to a transient at the input terminal
Data Source
AI summary
A linear regulator includes a pass transistor, a buffer transistor, and a low-pass filter circuit. The pass transistor is configured to pass a current from an input terminal to an output terminal. The buffer transistor is coupled to the input terminal and the pass transistor, and is configured to control the pass transistor. The low-pass filter circuit is coupled to the input terminal and the buffer transistor, and is configured to modulate a threshold voltage of the buffer transistor responsive to a transient at the input terminal.


