Passive Electronic Structure With Buffer Layer Against Passivation Cracks

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Solution Overview

Problem

Integrated passive electronic devices experience cracks in the passivation layer during thermal cycling due to stress accumulation from layers with different thermal expansion coefficients, leading to delamination and reduced reliability.

Innovation Solution

Incorporating a buffer layer made of a material with higher breaking strength than the passivation layer, such as silicon nitride or alumina, between the metallic and passivation layers to absorb thermal expansion and redistribute stress, reducing the risk of crack formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a passivation layer is deposited directly on the metallic layer, then the device structure is simple, but cracks form in the passivation layer during thermal cycling due to stress accumulation

Engineering Contradiction:
Improvecrack resistanceVSAvoidlayer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A buffer layer made of silicon nitride is introduced between the metallic layer and the passivation layer. This intermediary layer absorbs thermal expansion stress and prevents stress accumulation at the interface, thereby preventing cracks in the passivation layer during thermal cycling while maintaining overall structural simplicity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer layer changes the mechanical parameters at the interface by providing a material with intermediate properties between the metallic layer and passivation layer. This gradient in material properties reduces the abrupt stress concentration that would otherwise occur at the direct interface, preventing crack formation

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If layers with different thermal expansion coefficients are stacked together, then the device can be manufactured with standard processes, but stress accumulates during thermal cycling leading to delamination

Engineering Contradiction:
Improvemanufacturing processVSAvoidinterlayer adhesion
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The silicon nitride buffer layer acts as a mediator between layers with different thermal expansion coefficients. It gradually transitions the stress from the metallic layer to the passivation layer, preventing sudden stress concentration that would cause delamination while allowing standard manufacturing processes to be used

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the passivation layer covers the entire metallic layer surface, then complete protection is provided, but stress concentration occurs at the edges leading to cracks

Engineering Contradiction:
Improveprotection coverageVSAvoidedge stress concentration
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The buffer layer serves as a stress-absorbing intermediary at the edges where the passivation layer contacts the metallic layer. It prevents stress concentration from propagating into the passivation layer while maintaining complete coverage and protection of the metallic layer surface

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The buffer layer effectively manages thermal stress, preventing passivation layer cracks and enhancing the reliability and service life of the electronic device by maintaining structural integrity under thermal cycling.

Implementation Method 1

due to stress accumulation from layers with different thermal expansion coefficients

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

redistribute stress, reducing the risk of crack formation

Methodology Applied
Scientific EffectStress redistribution: Stress Relaxation

Data Source

PatentEP4704513A1Passive electronic device
Publication Date: 2026.03.04 STMICROELECTRONICS INT NV
  • EP4704513A1 patent drawingFigure 1A~2
  • EP4704513A1 patent drawingFigure 3~4
  • EP4704513A1 patent drawing

AI summary

The present description relates to an integrated passive electronic device (201) comprising a stacking in order, from an upper face of a support, of an insulating layer (113), a metallic layer (107) and a passivation layer (109) of an electrically insulating material, the passivation layer (109) covering the upper face and lateral sides of the metallic layer (107), in which a buffer layer (117), of another electrically insulating material, different from the material of the passivation layer (109), is formed on upper edges of the metallic layer (107) between the metallic layer (107) and the passivation layer (109), the buffer layer (117) being in contact with the metallic layer (107).