Buffer Layer Vt Modulation via Dopant Out-Diffusion Control
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Solution Overview
Problem
Controlling the threshold voltage (Vt) in field-effect transistors, particularly in pFETs, is challenging due to high Vt values, which affects device performance.
Innovation Solution
A method is developed to modulate Vt by correlating the thickness of a buffer layer to the out-diffusion of dopants during annealing, involving the adjustment of Ge % or C % concentration in the doped epitaxial layer, and using etching processes to control the buffer layer thickness and concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the thickness of the buffer layer is increased, then the out-diffusion of dopant into extension regions is reduced, but the device performance characteristics cannot be precisely adjusted
Solution Approach 1:
The buffer layer is divided into multiple layers with different thicknesses (first buffer layer, second buffer layer, third buffer layer) positioned at different locations relative to the gate structure. This segmentation allows independent control of dopant out-diffusion in different regions, enabling precise Vt adjustment without increasing overall device complexity
Solution Approach 2:
Different buffer layer thicknesses are assigned to different spatial locations: the first buffer layer (thinner) is positioned where dopant out-diffusion is desired to lower Vt, while the second buffer layer (thicker) is positioned where dopant retention is needed. This local differentiation enables precise Vt modulation by controlling dopant distribution characteristics in specific regions
2Manufacturing precision
If Ge % or C % concentration is adjusted in the doped epitaxial layer, then out-diffusion of dopant is controlled, but manufacturing process complexity increases
Solution Approach 1:
The Ge % or C % concentration in the doped epitaxial layer is systematically varied to control dopant out-diffusion during annealing. By adjusting this compositional parameter, the patent achieves precise control over dopant distribution and Vt characteristics without requiring complex multi-step processes
Solution Approach 2:
The doped epitaxial layer is formed as a composite material combining silicon with germanium or carbon elements at controlled concentrations. This composite structure enables tailored dopant diffusion characteristics while maintaining compatibility with standard semiconductor manufacturing processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively adjusts device performance characteristics by controlling the out-diffusion of dopants, allowing for precise modulation of Vt, improving pFET and nFET short channel voltage thresholds.
Implementation Method 1
annealing the doped layer to out-diffuse dopant into extension regions
Implementation Method 2
annealing the doped layer to out-diffuse dopant into extension regions
Data Source
AI summary
The disclosure relates to semiconductor structures and, more particularly, to one or more devices with an engineered layer for modulating voltage threshold (Vt) and methods of manufacture. The method includes finding correlation of thickness of a buffer layer to out-diffusion of dopant into extension regions during annealing of a doped layer formed on the buffer layer. The method further includes determining a predetermined thickness of the buffer layer to adjust device performance characteristics based on the correlation of thickness of the buffer layer to the out-diffusion. The method further includes forming the buffer layer adjacent to gate structures to the predetermined thickness.