Buffer Management in Distributed Memory for Parallel Tasks

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Solution Overview

Problem

Current embedded systems face challenges in optimizing memory architecture due to increasing complexity and variability in data processing, leading to inefficient memory allocation and buffer management, particularly in distributed memory spaces where tasks are unsynchronized and require dynamic resource allocation.

Innovation Solution

A device for managing data buffers in a distributed memory space that allocates and deallocates buffers dynamically across multiple memory elements, ensuring efficient access rights management and minimizing the number of buffers allocated to each memory element, while allowing for parallel access and minimizing time and resource penalties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If dynamic memory allocation is implemented to adapt to varying application contexts, then memory utilization efficiency is improved, but system complexity and overhead increase

Engineering Contradiction:
Improvememory utilization efficiencyVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic memory allocation where buffer assignments are not fixed but adapt based on runtime conditions. The system allows tasks to be dynamically assigned to buffers and memory elements, with the ability to reassign resources as application context changes, rather than using static pre-allocated memory structures

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes memory allocation parameters dynamically based on application needs. The number of buffers, their sizes, and their assignments to tasks are adjustable parameters that can be modified at runtime to optimize memory utilization for different application scenarios

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the number of buffers is increased to handle complex applications, then application versatility is improved, but memory fragmentation and allocation overhead increase

Engineering Contradiction:
Improveapplication versatilityVSAvoidmemory fragmentation
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent segments the memory space into multiple memory elements, each capable of holding multiple buffers. This segmentation allows the system to manage large numbers of buffers without creating fragmentation at the application level, as the underlying memory structure is organized into discrete allocatable units

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Buffers are designed as universal resources that can serve multiple tasks across different applications. A single buffer can be dynamically assigned to different tasks depending on application requirements, reducing the total number of buffers needed while maintaining application versatility

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If access rights management is implemented for buffer sharing, then task synchronization is improved, but processing overhead increases

Engineering Contradiction:
Improvetask synchronizationVSAvoidprocessing overhead
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system implements self-service access rights management where tasks automatically check and adhere to buffer access permissions without requiring external coordination. The access rights mechanism is integrated into the buffer structure itself, allowing tasks to autonomously determine whether they can read from or write to a buffer based on their assigned permissions

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9086920B2Device for managing data buffers in a memory space divided into a plurality of memory elements
Publication Date: 2015.07.21 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • US9086920B2 patent drawing
  • US9086920B2 patent drawing
  • US9086920B2 patent drawing

AI summary

In a device for managing data buffers in a memory space distributed over a plurality of memory elements, the memory space is allocatable by memory pages, each buffer including one or more memory pages. The buffers are usable by at least one processing unit for the execution of an application, the application being executed by a plurality of processing units executing tasks in parallel. The memory elements are accessible in parallel by the processing units. The device includes means for allocating buffers to the tasks during the execution of the application and means for managing access rights to the buffers. The means for managing the access rights to the buffers include means for managing access rights to the pages in a given buffer, to verify that writing to a given page does not modify data currently being read from the page or that reading from a given page does not access data currently being written to the page, in such a way as to share the buffer between unsynchronized tasks.