Buffer Memory Failure Detection Using Bit-Inverted Data
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Solution Overview
Problem
Memory failures in Field-Programmable Gate Arrays (FPGAs) can lead to incorrect detected values being provided to operators, making it difficult to accurately determine the presence of such failures.
Innovation Solution
A data processing apparatus and method that involves reading and writing bit-inverted data in memory, comparing the original and inverted data at different times to detect memory failures by checking for value discrepancies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional memory failure detection methods are used, then the detection process becomes complex with multiple write and read operations, but this increases the number of operations and reduces system efficiency
Solution Approach 1:
Instead of writing original data to memory and reading it back for comparison, the patent inverts the approach by writing inverted data (data with bits flipped) to memory and reading it back. This inversion technique allows detection of memory failures with a single write and read operation, resolving the contradiction between detection accuracy and system efficiency.
2Reliability
If multiple write and read operations are performed for memory failure detection, then detection accuracy is maintained, but the number of operations increases and time is consumed
Solution Approach 1:
The patent applies preliminary action by inverting the data before writing it to memory. This pre-processing step enables the system to detect memory failures during the normal write-read cycle without requiring additional separate detection operations, thereby maintaining reliability while reducing detection time.
3Measurement precision
If conventional detection methods with multiple operations are used, then memory failures can be detected, but the complexity of the detection process increases
Solution Approach 1:
The patent simplifies the detection process by inverting the conventional approach: instead of writing original data and comparing with expected values through multiple operations, it writes inverted data directly to memory and reads it back. This single operation approach maintains detection precision while significantly reducing process complexity.
Data Source
AI summary
In a data processing apparatus 11, a buffer memory BM including a first buffer memory RM1, a second buffer memory MM1, a third buffer memory RM2, and a fourth buffer memory MM2, stores therein data that is formed of a plurality of bits, and a CPU 11A reads the data from the buffer memory BM, performs bit inversion on the plurality of bits to generate bit inverted data in which a value of each of the bits is inverted, writes the bit inverted data in the buffer memory BM at a first time, reads the data from the buffer memory BM at a second time that is later than the first time, compares first data that is bit inverted data that is written in the buffer memory BM at the first time and second data that is bit inverted data that is read from the buffer memory BM at the second time, and determines presence of a failure in the buffer memory BM.