Buffer Memory Checksum Calculation for Data Integrity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing buffer memory systems face challenges in ensuring data integrity and efficiently calculating checksums for changed data units within the cache-only time span, leading to potential data corruption and increased latency during write-back operations.

Innovation Solution

A method and device for determining checksums within a buffer memory that involves reading changed data units, calculating checksums using integrated checksum units, and supplementing them within the cache-only time span, allowing for rapid and efficient integrity checks and minimal latency during data write-back.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If checksum calculation is performed for every changed data unit in buffer memory, then data integrity is ensured, but the time required exceeds the cache-only time span and increases latency

Engineering Contradiction:
Improvedata integrityVSAvoidcache-only time span
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by calculating checksums selectively rather than for every changed data unit. It identifies specific cases where checksum calculation is necessary (e.g., when data is written back to main memory) and performs checksum operations only in those scenarios, thereby reducing overall computational overhead while maintaining data integrity where it matters most.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent implements preliminary action by pre-calculating and storing checksums for changed data units within the buffer memory before the write-back operation occurs. This allows the checksum to be ready and available when needed, avoiding last-minute calculation delays that would exceed the cache-only time span.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple checksum calculation units are provided for parallel processing, then checksums for multiple data units can be calculated simultaneously, but the device complexity and number of components increase

Engineering Contradiction:
Improvechecksum calculation throughputVSAvoidnumber of checksum ascertainment units
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by implementing a configurable checksum calculation system where the number of active calculation units can be dynamically adjusted based on workload demands. Instead of providing a fixed large number of units, the system can activate additional units only when parallel processing is actually needed, balancing throughput requirements with device complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements universality by designing checksum calculation units that can handle multiple data units sequentially or that can be shared across different buffer memory regions. A single versatile checksum unit can serve multiple purposes and process different types of data, reducing the total number of specialized units required while maintaining adequate processing capacity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11138067B2Method and device for determining check sums, buffer memory and processor
Publication Date: 2021.10.05 ROBERT BOSCH GMBH
  • US11138067B2 patent drawing
  • US11138067B2 patent drawing
  • US11138067B2 patent drawing

AI summary

A method for determining check sums for a buffer memory for a processor, the method including a step of reading in a data unit of the buffer memory marked as changed by an access of the processor, a step of ascertaining a check sum for the data unit using a check sum unit of the buffer memory and a step of supplementing the data unit with the check sum and marking the data unit as changed with a valid check sum.