Buffer Memory Decoding Layout for Limited NAND Cache Capacity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing decoding methods for rewritable non-volatile memory modules face inefficiencies due to the need for repeated data retrieval from the memory module during encoding/decoding, which increases wear and reduces speed, especially in iteration decoding operations, due to the temporary storage requirements exceeding the buffer memory capacity.

Innovation Solution

A decoding method that utilizes a buffer memory with separate regions to store and copy decoding data, allowing for a first type decoding operation using copied data different from the original, thereby improving efficiency by avoiding repeated data retrieval and enabling real-time use of dynamically generated decoding data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is repeatedly read from the rewritable non-volatile memory module during encoding/decoding, then the buffer memory can store temporary data, but the memory module suffers additional wear and encoding/decoding speed is lowered

Engineering Contradiction:
Improvebuffer memory capacityVSAvoidencoding/decoding speed
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The buffer memory is divided into a first buffer region and a second buffer region. The first buffer region stores original data, while the second buffer region stores dynamically generated decoding data. This segmentation allows the system to efficiently manage limited buffer capacity by separating different types of data and their access patterns.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system pre-loads decoding data into the second buffer region before it is needed for the decoding operation. By preparing the decoding data in advance in the buffer memory, the system avoids the need to repeatedly read from the non-volatile memory module during the actual decoding process, thus improving speed and reducing wear.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If the buffer memory capacity is limited, then the device size and cost are reduced, but repeated data retrieval from the memory module is required, lowering decoding efficiency

Engineering Contradiction:
Improvebuffer memory capacityVSAvoiddecoding efficiency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The second buffer region acts as an intermediary between the non-volatile memory module and the decoding operation. It stores the decoding data locally, allowing the decoding process to access this data quickly without repeatedly reading from the slower non-volatile memory module, thus improving decoding efficiency despite limited buffer capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system copies the decoding data from the non-volatile memory module into the second buffer region of the buffer memory. This copy allows subsequent decoding operations to use the cached data locally, avoiding repeated reads from the memory module and significantly improving decoding efficiency.

Inventive Principle:
Principle #26Copying

3Productivity

If decoding data is stored in the buffer memory for real-time use, then repeated data retrieval is avoided and decoding efficiency is improved, but the buffer memory requires separate regions and management complexity increases

Engineering Contradiction:
Improvedecoding efficiencyVSAvoidbuffer memory structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The buffer memory is segmented into two distinct regions: the first buffer region for storing original data and the second buffer region for storing decoding data. This clear segmentation simplifies memory management by defining specific purposes for each region, making it easier to track and manage data flow despite the increased functionality.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10447314B2Decoding method, memory storage device and memory control circuit unit
Publication Date: 2019.10.15 PHISON ELECTRONICS
  • US10447314B2 patent drawing
  • US10447314B2 patent drawing
  • US10447314B2 patent drawing

AI summary

A decoding method which includes: storing first data into a buffer memory which includes a first buffer region and a second buffer region; copying decoding data in the second buffer region to the first buffer region; performing a first type decoding operation for the first data based on the copied decoding data in the first buffer region, where the copied decoding data is different from original decoding data corresponding to the first data; and outputting decoded data if the first type decoding operation is successful.