Buffer-Based Concurrent Memory Mirroring for Server Failover
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Solution Overview
Problem
Conventional memory mirroring systems in computer networks face delays and require administrator intervention due to storage path complexities and the need for acknowledgement of data mirroring, leading to unacceptable downtime during server failures.
Innovation Solution
A system that uses a processor and buffer to concurrently write data to both a local and remote memory, utilizing high-speed copper or optical cables, allowing automatic server failover without processor cycles being allocated for data copying, thus minimizing latency and enabling seamless application recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is mirrored using conventional PCIe fabric through I/O interfaces and switches, then data redundancy is achieved, but transmission latency increases and processing speed decreases
Solution Approach 1:
The patent segments the data mirroring function from the processor by introducing a dedicated buffer that handles concurrent writing to local and remote memories. This separation allows the processor to continue executing instructions without waiting for mirroring operations, thereby maintaining high transmission speed while ensuring data redundancy through the buffer's parallel write capabilities.
Solution Approach 2:
The buffer acts as an intermediary between the processor and the remote memory system. It receives data from the processor and autonomously manages the concurrent writing to both local and remote memories, eliminating the need for processor involvement in the mirroring process. This intermediary mechanism resolves the contradiction by enabling fast data transfer without compromising redundancy.
2Reliability
If the primary server waits for acknowledgement that data has been successfully mirrored, then data integrity is ensured, but system downtime increases during failures
Solution Approach 1:
The buffer performs preliminary actions by pre-writing data to both local and remote memories concurrently before any failure occurs. This advance preparation ensures that when a failure happens, the backup data is already available, eliminating the need for time-consuming recovery operations and reducing system downtime while maintaining data integrity.
Solution Approach 2:
The buffer enables continuous data mirroring operations without interruption to the primary server's processing. By handling the mirroring in the background through dedicated buffer memory, the system maintains continuous protection without requiring the primary server to pause or wait for acknowledgements, thus reducing downtime while ensuring data integrity.
3Reliability
If processor cycles are allocated to copy data to buffer and remote memory, then data mirroring is performed, but processor productivity decreases
Solution Approach 1:
The patent segments the data mirroring function from the processor by introducing a dedicated buffer that handles concurrent writing to local and remote memories. This separation allows the processor to continue executing instructions without waiting for mirroring operations, thereby maintaining high transmission speed while ensuring data redundancy through the buffer's parallel write capabilities.
Solution Approach 2:
The buffer operates autonomously to perform data mirroring without requiring processor intervention. It self-manages the concurrent writing to both local and remote memories, freeing the processor to focus on its primary computational tasks. This self-service mechanism ensures data mirroring reliability while maximizing processor productivity.
Data Source
AI summary
Systems and methods to mirror data and otherwise manage memory are provided. A buffer may be coupled to a processor and be configured to write a first copy of data to a first memory located at a first server computer and a second copy of the data to a second memory that is accessible to both the first server computer and a second server computer. The buffer may be coupled directly to at least one of the first memory and the second memory via a memory bus, copper cable, or an optical cable. The buffer may write the first and the second copies of the data concurrently.