Buffer Circuit Offset Blocking for Low DC Offset and Fast Slew Rate
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Solution Overview
Problem
Display devices face challenges in reducing or eliminating DC offset and improving slew rate, which are essential for enhancing the performance of display devices like LCDs and OLEDs.
Innovation Solution
A buffer circuit is designed with a slew-rate compensating circuit and an offset blocking circuit, where the operational amplifier generates output voltage, and the slew-rate compensating circuit provides compensation currents based on voltage differences, while the offset blocking circuit turns off the boosting transistor when the voltage difference is less than a reference level, thereby reducing DC offset and improving slew rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a buffer circuit uses a conventional operational amplifier without offset blocking, then the circuit structure is simple, but DC offset accumulates and slew rate is limited
Solution Approach 1:
The patent introduces an offset blocking circuit as an intermediary component between the operational amplifier and the output. This circuit includes a blocking transistor that prevents DC offset from propagating to the output while allowing AC signals to pass through. The intermediary blocking circuit resolves the contradiction by adding minimal complexity specifically targeted at eliminating DC offset without affecting the overall simplicity of the buffer circuit structure.
Solution Approach 2:
The buffer circuit is segmented into distinct functional blocks: the operational amplifier for signal amplification, the offset blocking circuit for DC offset elimination, and the slew rate compensating circuit for improving transient response. This segmentation allows each component to address a specific problem independently, resolving the contradiction by organizing complexity into manageable, functionally-separated modules.
2Speed
If the boosting transistor is always on to improve slew rate, then the slew rate increases, but DC offset is generated and power consumption increases
Solution Approach 1:
The blocking transistor is designed to dynamically change its state based on the input signal characteristics. When a large voltage step is detected (indicating need for high slew rate), the transistor turns on to allow compensation current flow. When the signal is stable or small variations occur, the transistor turns off to eliminate DC offset and reduce power consumption. This dynamic behavior resolves the contradiction by adapting the circuit's energy consumption and slew rate capability to the actual signal requirements.
Solution Approach 2:
The circuit changes the operating parameter (transistor conduction state) based on the voltage difference between input and output. When the voltage difference exceeds a threshold, the blocking transistor conducts to enable slew rate compensation. When the voltage difference is within the threshold, the transistor blocks to prevent DC offset. This parameter-based control resolves the contradiction by adjusting the circuit's electrical characteristics in response to signal conditions.
3Reliability
If the blocking transistor remains on to prevent DC offset, then DC offset is reduced, but the slew rate compensation is limited
Solution Approach 1:
The blocking transistor operates in periodic cycles of conduction and blocking based on the signal transition requirements. During signal transitions requiring high slew rate, the transistor conducts temporarily to allow compensation current. During stable periods, the transistor blocks to maintain low DC offset. This periodic action pattern resolves the contradiction by providing slew rate enhancement only when necessary while maintaining DC offset reduction during steady-state operation.
Data Source
AI summary
A buffer circuit according to an aspect of the inventive concepts include an operational amplifier configured to amplify an input voltage to generate an output voltage; a slew-rate compensating circuit configured to generate a compensation current based on a difference between a voltage level of the input voltage and a voltage level of the output voltage, and configured to provide the compensation current to the operational amplifier through a boosting transistor; and an offset blocking circuit configured to turn off the boosting transistor when the difference between the voltage level of the input voltage and the voltage level of the output voltage is less than a reference voltage level by providing a blocking current to the slew-rate compensating circuit.