Buffer Segmentation for Deadlock Prevention in Multi-Socket Systems

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Solution Overview

Problem

In multiple socket computing systems, existing communication mechanisms often lead to deadlocks due to insufficient buffer capacity in integrated circuits, causing communication channels to become blocked and preventing forward progress.

Innovation Solution

The implementation of communication circuitry on a motherboard with buffers in each integrated circuit that reserve slots for messages, ensuring that at least one slot is always available for forward progress, thereby preventing deadlocks by allowing a maximum number of outstanding instructions to be stored without overflowing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If buffer capacity in integrated circuits is increased to store more outstanding instructions, then the ability to handle multiple types of instructions is improved, but the risk of buffer overflow and deadlock increases

Engineering Contradiction:
Improvebuffer capacityVSAvoiddeadlock prevention
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The buffer is segmented into different regions: a first portion for storing instructions of a first type (e.g., store instructions) and a second portion for storing instructions of a second type (e.g., load instructions). This segmentation allows independent management of different instruction types, preventing deadlock by ensuring that one instruction type does not block the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the buffer are allocated with different characteristics based on the specific needs of different instruction types. The first portion is optimized for store instructions while the second portion is optimized for load instructions, allowing each type to be handled efficiently without interfering with the other.

Inventive Principle:
Principle #3Local quality

2Productivity

If buffer size is enlarged to accommodate maximum outstanding instructions, then instruction throughput is improved, but storage space for other instruction types is reduced

Engineering Contradiction:
Improveinstruction throughputVSAvoidstorage space for other instruction types
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The buffer is divided into multiple segments or portions, each dedicated to storing specific types of instructions. This allows the total buffer capacity to be fully utilized while maintaining adequate space for each instruction type simultaneously, thereby improving overall throughput without sacrificing storage for any particular instruction type.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9665505B2Managing buffered communication between sockets
Publication Date: 2017.05.30 MARVELL ASIA PTE LTD
  • US9665505B2 patent drawing
  • US9665505B2 patent drawing
  • US9665505B2 patent drawing

AI summary

A motherboard includes multiple sockets, each socket configured to accept an integrated circuit. A first integrated circuit in a first socket includes one or more cores and at least one buffer. A second integrated circuit in a second socket includes one or more cores and at least one buffer. Communication circuitry transfers messages to buffers of integrated circuits coupled to different sockets. A first core on the first integrated circuit is configured to send messages corresponding to multiple types of instructions to a second core on the second integrated circuit through the communication circuitry. The buffer of the second integrated circuit is large enough to store a maximum number of instructions of a second type that are allowed to be outstanding from cores on the first integrated circuit at the same time, and still have enough storage space for one or more instructions of a first type.