Buffer Segmentation for Video Decoder Idle Time Reduction
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Solution Overview
Problem
The increasing complexity of multimedia systems with integrated hardware elements and operating systems like Linux with preemptive multitasking leads to increased system load and idle time for video decoders, reducing overall system efficiency due to prolonged waiting for CPU service after decoding a frame.
Innovation Solution
A computer system architecture that employs multiple buffers and occupancy flags to allow sub-systems like video decoders to operate independently and efficiently by storing returned information in buffers and managing flags, enabling them to continue tasks without waiting for CPU processing, thus reducing idle time and improving system efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the operating system becomes more complicated with preemptive multitasking and integrated hardware elements, then the system functionality and adaptability improve, but the system load increases and the idle time for video decoder waiting for CPU service increases, reducing system efficiency
Solution Approach 1:
The patent divides the buffer into multiple segments (first buffer, second buffer, third buffer, etc.) that can be independently accessed by different tasks. This segmentation allows the video decoder to write decoded data to one buffer while the CPU processes data from another buffer simultaneously, eliminating the waiting idle time caused by complex operating system multitasking while maintaining full system functionality.
2Reliability
If the video decoder waits for CPU to read returned information after decoding a frame, then data accuracy is ensured, but the idle time increases and system efficiency decreases
Solution Approach 1:
The patent implements preliminary action by having the video decoder write decoded data to buffers in advance before the CPU needs to read them. Multiple buffers are prepared beforehand, allowing the decoder to continuously write new decoded frames to available buffers without waiting for CPU reading completion. The occupancy flags are also set in advance to guide the CPU on where to read data next, ensuring data accuracy is maintained while eliminating idle waiting time.
3Productivity
If multiple buffers are used to allow continuous decoding operations, then system efficiency improves, but device complexity increases
Solution Approach 1:
The patent uses occupancy flags as feedback mechanisms to manage multiple buffers efficiently. Each buffer has an occupancy flag that provides real-time feedback to both the video decoder and CPU about the buffer's status (occupied or available). This simple feedback system automatically coordinates the production-consumption relationship between decoder and CPU without requiring complex management logic, thus improving system efficiency while keeping device complexity manageable.
Data Source
AI summary
A computer system architecture including a first buffer, a second buffer, a sub-system and a CPU is provided. The sub-system carries out a first task to obtain first returned information, stores the first returned information in the first buffer and sets up a first occupancy flag to the first buffer. Next, the sub-system carries out a second task to obtain second returned information, stores the second returned information in the second buffer, and sets up a second occupancy flag to the second buffer. The CPU reads the first returned information and eliminates the first occupancy flag. After the second returned information is stored in the second buffer and the first occupancy flag is eliminated, the sub-system continuously carries out a third task to obtain third returned information, stores the third returned information in the first buffer, and sets up the first occupancy flag to the first buffer.