Buffer Slew Rate Adjustment Using Threshold-Triggered Current Boost

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Solution Overview

Problem

In display devices, the increased capacitance and decreased horizontal frequency of circuits lead to a slew rate issue in buffer circuits, which affects the transition time of output signals, and existing solutions fail to improve this without increasing current consumption, potentially causing overheating.

Innovation Solution

A slew rate adjusting circuit is introduced, comprising an adjustment transistor, a first transistor, and a second transistor, which provides an adjustment current to the output port when the difference between input and output voltages exceeds a reference voltage, thereby increasing the slew rate without altering current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the capacitance of the buffer circuit is increased to handle larger signals, then the signal handling capability is improved, but the transition time increases and slew rate decreases

Engineering Contradiction:
ImprovecapacitanceVSAvoidslew rate
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The circuit dynamically adjusts the current based on the operating state by using transistors that automatically activate when the voltage difference exceeds a threshold. This dynamic current adjustment allows the circuit to maintain high slew rate during fast transitions while handling large capacitance values, resolving the contradiction between capacitance and slew rate.

Inventive Principle:
Principle #15Dynamics

2Speed

If the current consumption is increased to improve the slew rate, then the transition time is reduced, but the heat generation increases causing overheating

Engineering Contradiction:
Improvetransition timeVSAvoidheat generation
Core Design Contradiction:
SpeedVSTemperature

Solution Approach 1:

The circuit applies partial current enhancement by only activating the adjustment transistor when necessary (when voltage difference exceeds threshold). This partial action provides sufficient current to reduce transition time during critical moments without maintaining high current consumption continuously, thereby preventing overheating while improving transition speed.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The circuit employs periodic or conditional current adjustment based on the voltage difference threshold. The adjustment transistor activates intermittently only when the voltage difference exceeds the reference level, creating a periodic action pattern that reduces average current consumption and heat generation while maintaining fast transition capability when needed.

Inventive Principle:
Principle #19Periodic action

3Speed

If existing solutions are used to improve slew rate, then the transition time is reduced, but the current consumption increases excessively

Engineering Contradiction:
Improveslew rateVSAvoidcurrent consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The circuit uses feedback through the voltage difference detection mechanism where the activation of the adjustment transistor is controlled by the actual voltage difference between input and output. This feedback control ensures current is only increased when genuinely needed for slew rate improvement, preventing unnecessary current consumption while maintaining optimal performance.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11641199B2Slew rate adjusting circuit for adjusting slew rate, buffer circuit including same, and slew rate adjusting method
Publication Date: 2023.05.02 MAGNACHIP SEMICON LTD
  • US11641199B2 patent drawing
  • US11641199B2 patent drawing
  • US11641199B2 patent drawing

AI summary

A slew rate adjusting circuit includes an adjustment transistor configured to provide an adjustment current into an output port of an arithmetic amplifier, a first transistor connected between a power line of the arithmetic amplifier and the adjustment transistor, and a second transistor connected between the first transistor and an output node of the output port, wherein the adjustment transistor is turned on by the second transistor in response to a difference between an input voltage and an output voltage being equal to or greater than a reference voltage, and the adjustment current is provided to the output port in response to the adjustment transistor being turned on.