Buffer Structure Mitigating Thermal Stress in Through Silicon Vias
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Solution Overview
Problem
Semiconductor devices with through silicon vias (TSVs) face challenges in structural stability and integration density due to thermal stress and the need for larger keep-out zones, which limit their performance and compactness in multi-chip stacked packages.
Innovation Solution
The introduction of internal and external buffer structures, such as air gaps, surrounding the through via and spaced apart from it, helps mitigate thermal stress and reduce the keep-out zone, thereby enhancing structural stability and integration density by anchoring the through via and protecting the semiconductor component from stress and impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If through silicon via (TSV) is used in multi-chip stacked package, then integration density and compactness are improved, but structural stability deteriorates due to thermal stress
Solution Approach 1:
The patent introduces a buffer structure as an intermediary element between the through via and the semiconductor component. This buffer structure (comprising a first buffer layer and a second buffer layer) mediates the thermal stress transmission, absorbing and distributing the stress to prevent direct transmission to the semiconductor component, thereby maintaining structural stability while preserving the integration benefits of TSV technology.
Solution Approach 2:
The buffer structure is formed in advance during the fabrication process, before the semiconductor component is fully assembled and subjected to thermal cycling. The buffer layers are deposited and patterned to create a protective cushioning structure that will absorb thermal stress during subsequent operation, preventing damage to the semiconductor component from thermal expansion and contraction.
2Area of stationary object
If through via is used to achieve compact design, then planar size is reduced, but keep-out zone increases requiring larger spacing
Solution Approach 1:
The buffer structure serves as an intermediary zone between the through via and the semiconductor component, replacing the traditional large keep-out zone. By using the buffer layers to manage thermal stress, the patent reduces the required spacing distance, allowing the semiconductor component to be positioned closer to the through via while still maintaining reliability, thus reducing the overall planar size.
3Stability of the object's composition
If buffer structure is added around through via, then structural stability is improved, but device complexity increases
Solution Approach 1:
The buffer structure is implemented with local quality by using different material compositions for different layers. The first buffer layer has a composition optimized for adhering to the through via, while the second buffer layer has a composition optimized for interfacing with the semiconductor component. This localized differentiation of material properties allows the buffer structure to perform multiple functions (stress management, adhesion, protection) without requiring a completely new complex architecture.
Solution Approach 2:
The buffer structure performs multiple functions simultaneously: it acts as a thermal stress buffer, provides mechanical adhesion between the through via and semiconductor component, and serves as a protective barrier. By consolidating these functions into a single integrated buffer structure rather than separate components, the patent improves structural stability without proportionally increasing device complexity.
Data Source
AI summary
A semiconductor device including a substrate having a first surface and a second surface facing the first surface, the substrate having a via hole, the via hole extending from the first surface of the substrate toward the second surface of the substrate, a through via in the via hole, a semiconductor component on the first surface of the substrate, and an internal buffer structure spaced apart from the via hole and between the via hole and the semiconductor component, the internal buffer structure extending from the first surface of the substrate toward an inside of the substrate, a top end of the internal buffer structure being at a level higher than a top end of the through via may be provided.