Buffered Assertion Reporting in Hardware Emulation

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Solution Overview

Problem

The IEEE Standard 1800-2017 requires synchronous reporting of assertion failures and execution of fail action blocks in hardware-software co-simulation, leading to significant wall clock time overhead and reduced emulator operating frequency due to frequent hardware-software synchronization events, especially in designs with a large number of assertions.

Innovation Solution

A system and method for buffered assertion reporting, where assertion failure events are stored in a buffer by a hardware emulator and transferred asynchronously to a software host, allowing the fail action blocks to be executed without halting the emulator, thus avoiding the need for synchronous hardware-software synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If synchronous hardware-software synchronization is used to report assertion failures and execute fail action blocks, then the IEEE Standard 1800-2017 compliance is achieved, but wall clock time overhead increases and emulator operating frequency decreases

Engineering Contradiction:

ImproveIEEE Standard 1800-2017 complianceVSAvoidwall clock time overhead

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-buffering assertion failure events in the hardware emulator before transferring them to the software host. This allows the emulator to continue executing without halting for synchronization, while the buffer holds assertion failure information ready for subsequent processing. The buffer acts as a preliminary storage mechanism that decouples the timing of failure detection from failure reporting.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces a buffer as an intermediary component between the hardware emulator and software host. This buffer mediates the assertion failure reporting process by accepting failures from the hardware side and making them available to the software host asynchronously, eliminating the need for synchronous hardware-software coordination while maintaining data integrity.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Measurement precision

If synchronous hardware-software synchronization is used for assertion failure reporting, then assertion failures are reported at the correct simulation time, but emulator operating frequency is reduced

Engineering Contradiction:

Improveassertion failure timing accuracyVSAvoidemulator operating frequency

Core Design Contradiction:

Measurement precisionVSProductivity

Solution Approach 1:

The hardware emulator performs preliminary action by detecting and buffering assertion failure events with their associated simulation time information before transferring to the software host. This preliminary buffering preserves the timing information while allowing the emulator to maintain high operating frequency without synchronous interruptions.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating a buffer copy of assertion failure events in the hardware emulator. This copy contains all necessary information including simulation time, allowing the software host to process failures asynchronously while the hardware continues operating at full speed. The copy mechanism enables independent processing without affecting the original emulation timeline.

Inventive Principle:

Principle #26Copying

3Reliability

If frequent hardware-software synchronization events are implemented, then assertion failures are immediately processed, but system performance deteriorates

Engineering Contradiction:

Improveassertion failure processing completenessVSAvoidsystem performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The buffer serves as an intermediary that collects multiple assertion failure events from the hardware emulator and makes them available to the software host in batches. This eliminates the need for immediate synchronous processing of each individual failure, reducing synchronization overhead while ensuring all failures are eventually processed with complete information.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent enables continuity of useful action by allowing the hardware emulator to continue executing emulation tasks without interruption for synchronization. The buffer continuously accumulates assertion failure events while the emulator maintains uninterrupted operation, ensuring both processing completeness and sustained high performance.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS11475192B1Methods and apparatus for buffered assertion reporting in emulation

Publication Date: 2022.10.18 CADENCE DESIGN SYST INC

AI summary

Systems and methods for IC chip design testing can include a hardware emulator, having circuitry to emulate functionalities of an integrated circuit chip design and a buffer, detecting an assertion failure event indicative of a failed assertion on one of the functionalities, and storing a message indicative of the assertion failure event in the buffer. The circuitry can transfer, asynchronously relative to execution of the hardware emulator, the message from the buffer to a software host device without halting the execution of the hardware emulator. The software host device can receive the message indicative of the assertion failure event, and execute, asynchronously relative to the execution of the hardware emulator, at least one fail action instruction associated with the assertion failure event.