Buffered Current Mirror Circuit With Reduced Offset Sensitivity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current mirrors face challenges in achieving high linearity and wide signal bandwidth, as linearity is often traded off against bandwidth, and existing solutions struggle with stability issues and buffer offset sensitivity at high operating frequencies.

Innovation Solution

Incorporating buffers and additional resistors on the master and slave sides of current mirror circuits, which helps stabilize the circuit, reduces sensitivity to buffer offsets, and improves bandwidth and linearity by degenerating the impact of parasitic capacitances and buffer non-idealities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If buffers are added to stabilize the current mirror circuit, then stability improves, but sensitivity to buffer offsets increases

Engineering Contradiction:
Improvecircuit stabilityVSAvoidbuffer offset sensitivity
Core Design Contradiction:
Stability of the object's compositionVSMeasurement precision

Solution Approach 1:

The patent introduces an intermediary component (the buffer amplifier) between the master and slave current mirror circuits. This buffer acts as a mediator that isolates the master circuit from the slave circuit, preventing direct interaction and stabilizing the overall circuit operation while managing the buffer offset through proper circuit design

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If linearity is improved in current mirrors, then signal accuracy increases, but bandwidth decreases

Engineering Contradiction:
ImprovelinearityVSAvoidsignal bandwidth
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent divides the current mirror circuit into separate master and slave portions with independent biasing and buffering. This segmentation allows each portion to be optimized independently - the master portion for linearity and the slave portion for bandwidth, thereby resolving the traditional linearity-bandwidth tradeoff

Inventive Principle:
Principle #1Segmentation

3Speed

If buffers are used to improve bandwidth, then signal frequency range increases, but circuit stability deteriorates

Engineering Contradiction:
Improvesignal bandwidthVSAvoidcircuit stability
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent employs feedback mechanisms within the buffer amplifier design and circuit configuration to maintain stability across wide frequency ranges. The feedback loop compensates for phase shifts and gain variations that occur at high frequencies, allowing the buffer to extend bandwidth without sacrificing circuit stability

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10895887B1Current mirror arrangements with reduced sensitivity to buffer offsets
Publication Date: 2021.01.19 ANALOG DEVICES INC
  • US10895887B1 patent drawing
  • US10895887B1 patent drawing
  • US10895887B1 patent drawing

AI summary

An example current mirror arrangement includes a first portion and a second portion, each of which includes a current mirror having transistors Q1 and Q2, a buffer amplifier that has an input coupled to a base/gate terminal of Q1 and an output coupled to a base/gate terminal of Q2, a master resistor coupled to an emitter/source terminal of Q1, and a slave resistor coupled to an emitter/source terminal of Q2. Furthermore, the slave resistor of the first portion is coupled to the slave resistor of the second portion. Providing additional resistors on master and slave sides of a current mirror arrangement may advantageously allow benefiting from the use of buffers outside of a feedback loop of a current mirror while reducing the sensitivity of the current mirror arrangement to buffer offsets.