Buffered DRAM With Unidirectional Paths for Long Modules

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Solution Overview

Problem

Emerging memory board/module form factors face challenges with densely packed signals that need to propagate long distances, requiring efficient signal transmission and reception across different directions without interference.

Innovation Solution

A dynamic random access memory (DRAM) device configured to support both long and narrow module form factors, with separate unidirectional read and write data interfaces, and the ability to retransmit or not retransmit signals based on its physical location on the module, using control signals to manage signal flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If signals are densely packed to support emerging memory board/module form factors, then space utilization is improved, but signal interference increases and transmission quality deteriorates

Engineering Contradiction:
Improvemodule areaVSAvoidsignal interference
Core Design Contradiction:
Area of moving objectVSObject-affected harmful factors

Solution Approach 1:

The data interface is segmented into separate unidirectional read and write data interfaces, allowing independent signal transmission paths that reduce interference between signals traveling in different directions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A buffer is introduced as an intermediary component between the memory array and the data interface, which receives signals from the memory array and selectively retransmits them through the unidirectional interfaces, thereby isolating and managing signal interference

Inventive Principle:
Principle #24Intermediary (Mediator)

2Length of moving object

If signals need to propagate long distances in long and narrow module form factors, then connectivity is improved, but signal degradation increases

Engineering Contradiction:
Improvemodule lengthVSAvoidsignal transmission quality
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The buffer acts as an intermediary that receives signals from the memory array and selectively retransmits them through the unidirectional interfaces, thereby isolating and managing signal interference

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer controls signal retransmission based on configuration parameters, enabling dynamic adjustment of signal transmission characteristics to maintain quality over long distances

Inventive Principle:
Principle #35Parameter changes

3Productivity

If separate unidirectional read and write data interfaces are implemented, then signal transmission efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvesignal transmission efficiencyVSAvoidinterface configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The data interface is segmented into separate unidirectional read and write data interfaces, allowing independent signal transmission paths that reduce interference between signals traveling in different directions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The buffer is designed to handle multiple functions including signal reception from the memory array, signal retransmission through unidirectional interfaces, and configuration-based control, thereby reducing overall system complexity despite the separate interfaces

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12374388B2Buffered dynamic random access memory device
Publication Date: 2025.07.29 RAMBUS INC
  • US12374388B2 patent drawing
  • US12374388B2 patent drawing
  • US12374388B2 patent drawing

AI summary

A DRAM device may be configured to retransmit or not retransmit zero or more of command/address signals, write data signals, read data signals, and/or data strobe signals. The DRAM device may have separate, unidirectional read data signal and write data signal interfaces. Combined activate and read or write commands may be implemented. The configuration of the DRAM to retransmit or not retransmit signals may be determined by the DRAM device's physical location on a module via hardwired configuration pins. The various configurations allows a DRAM device to be used on both a long and narrow form factor module and a DIMM module.