Buffered FinFET Device Hardening Against Single Event Upsets
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Solution Overview
Problem
FinFET devices are susceptible to single event upsets (SEUs) and electronic noise signals due to their small dimensions, which can compromise the operation and performance of integrated circuits, particularly in memory cells and analog circuit applications.
Innovation Solution
A buffered finFET device is fabricated with a p-n junction between the channel and the base of the vertical fin-shaped structure, utilizing a buffer layer of opposite doping polarity to the well region, which reduces SEUs and substrate noise, and is implemented in static memory cells and analog circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If finFET devices are made with small dimensions, then device density and integration are improved, but susceptibility to single event upsets and electronic noise increases
Solution Approach 1:
A buffer layer with opposite doping polarity is introduced between the channel and the well region. This intermediary layer forms p-n junctions that act as potential barriers to intercept and collect charge carriers, preventing them from reaching sensitive nodes and causing SEUs or noise interference
Solution Approach 2:
The p-n junctions formed by the buffer layer are designed to collect charge carriers that would otherwise cause harmful effects. By converting the harmful charge carriers into useful current at the p-n junctions, the device transforms potential damage into a beneficial effect that protects sensitive nodes
2Reliability
If a buffer layer is added to reduce SEUs and noise, then reliability is improved, but device complexity increases
Solution Approach 1:
The buffer layer is selectively formed only in specific regions where p-n junctions are needed for radiation hardening and noise isolation, rather than uniformly throughout the device. This localized approach provides protection where most needed while minimizing additional complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buffered finFET device effectively hardens against radiation-induced charge and reduces electronic noise, enhancing the reliability of memory cells and analog circuits by isolating noise and reducing the occurrence of SEUs.
Implementation Method 1
a p-n junction between the channel and the base of the vertical fin-shaped structure, utilizing a buffer layer of opposite doping polarity to the well region, which reduces SEUs and substrate noise
Implementation Method 2
The buffered finFET device effectively hardens against radiation-induced charge and reduces electronic noise, enhancing the reliability of memory cells and analog circuits by isolating noise and reducing the occurrence of SEUs
Data Source
Figure 1
Figure 2~2C'
Figure 3A-A'~3
AI summary
One embodiment relates to a buffered transistor device. The device includes a buffered vertical fin-shaped structure formed in a semiconductor substrate. The vertical fin-shaped structure includes at least an upper semiconductor layer, a buffer region, and at least part of a well region. The buffer region has a first doping polarity, and the well region has a second doping polarity which is opposite to the first doping polarity. At least one p-n junction that at least partially covers a horizontal cross section of the vertical fin-shaped structure is formed between the buffer and well regions. Other embodiments, aspects, and features are also disclosed.