Buffered Multi-Channel Multiplexer for Low-Leakage Sensor Switching

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Solution Overview

Problem

In multiplexer systems where multiple sensors are connected, leakage current through disabled channels can distort sensor signals due to high output impedance of sensors, leading to undesirable voltage modifications.

Innovation Solution

The implementation of a multiplexer circuit with multiple metal oxide semiconductor field effect transistors (MOS transistors) where the bulk of at least one MOS transistor is biased to reduce leakage current, and the use of a buffer to maintain the drain-to-source potential difference across 'off' channels at approximately 0 V, thereby minimizing leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple sensors are connected to the multiplexer, then the system can process signals from multiple sensors, but leakage current through disabled channels distorts sensor signals

Engineering Contradiction:
Improvemulti-sensor signal processing capabilityVSAvoidsignal distortion from leakage current
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

A buffer circuit is introduced as an intermediary between the multiplexer output and the processing system. This buffer maintains the drain-to-source potential difference at approximately 0V for disabled channels, preventing leakage current from distorting sensor signals while allowing multiple sensors to be connected.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The bulk bias voltage of MOS transistors in disabled channels is dynamically adjusted based on the input voltage level. When the input voltage exceeds a threshold, the bulk bias is changed to reduce leakage current, thereby preventing signal distortion while maintaining multi-sensor connectivity.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If the bulk of MOS transistor is biased to reduce leakage current, then signal accuracy improves, but circuit complexity increases

Engineering Contradiction:
Improvesensor signal accuracyVSAvoidbulk biasing circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The bulk bias voltage is dynamically changed based on the input voltage level relative to a threshold. This parameter change reduces leakage current in disabled channels, improving signal accuracy without requiring complex additional circuitry beyond a simple voltage comparison mechanism.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The bulk biasing circuit automatically adjusts the bulk voltage based on the input signal conditions, eliminating the need for external complex control circuits. The circuit self-regulates to maintain signal accuracy by reducing leakage current when channels are disabled.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces leakage current through disabled channels, preventing signal distortion and ensuring accurate sensor signal processing by maintaining the voltage across 'off' channels at a minimal level.

Implementation Method 1

The bulk biasing circuit is configured to bias the bulk of the first transistor at a first bias voltage responsive to a voltage on the input node being above a first voltage level, and to bias the bulk of the first transistor at a second bias voltage responsive to the voltage on the input node being below a second voltage level

Methodology Applied
Scientific EffectBulk biasing: Electric Field

Data Source

PatentEP4070457B1Multi-channel multiplexer
Publication Date: 2025.05.07 TEXAS INSTRUMENTS INC
  • EP4070457B1 patent drawingFigure 1
  • EP4070457B1 patent drawingFigure 2~5
  • EP4070457B1 patent drawingFigure 3

AI summary

A circuit (400) includes a first switch assembly (111) having a first input node and a first output node, and a second switch assembly (112) having a second input node and a second output node. The circuit further includes a third switch assembly (430), an operational amplifier (130), and a buffer (410). The third switch assembly (430) has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer (410) has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier (130). The buffer output is coupled to the third switch assembly (430).