Buffered SAR ADC Input Switching to Repress Current Non-Linearity
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Solution Overview
Problem
Capacitive SAR ADCs are susceptible to non-linearity due to switching activities of switches, leading to signal-dependent current variations that affect performance and cost-effectiveness.
Innovation Solution
Incorporating an amplifier as a buffer between the first switch and the input node, and controlling switches with predetermined timing to isolate the input node from switching operations, thereby reducing non-linear components by using switches with higher impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If switches are operated to convert analog signal to digital signal in capacitive SAR ADC, then analog-to-digital conversion is achieved, but non-linearity and signal-dependent current variations occur
Solution Approach 1:
An amplifier is introduced as an intermediary component between the switch and the input node. The amplifier buffers the switching operations, isolating the input node from direct switching effects. This mediator absorbs the non-linearities generated by switch operations while maintaining accurate signal transfer to the ADC capacitor array.
Solution Approach 2:
The system is segmented into distinct functional blocks: the input stage with amplifier, the switching network, and the ADC core. By separating the switching operations from the input signal path through the amplifier buffer, each segment can be optimized independently - the amplifier handles linear buffering while switches perform digital control functions.
2Reliability
If switches with lower impedance are used for better signal transfer, then signal transfer efficiency improves, but non-linear components and input current increase
Solution Approach 1:
The amplifier serves as a buffer intermediary that decouples the impedance requirements of different stages. The amplifier's high input impedance prevents loading effects on the signal source, while its low output impedance drives the ADC capacitor array effectively, eliminating the need for low-impedance switches that would increase input current.
Solution Approach 2:
The impedance parameters are optimized at different stages: the amplifier provides high input impedance to minimize input current draw, while maintaining low output impedance for effective signal driving. This parameter optimization across stages reduces non-linear components without sacrificing signal transfer accuracy.
Data Source
AI summary
A system includes an amplifier to receive a signal, an analog-to-digital converter (ADC), a first switch coupled to a capacitor to receive an output from the amplifier, the capacitor to provide the output to the ADC, a second switch coupled between the capacitor and the ADC to turn on/off the ADC, a third switch coupled between the amplifier and the first switch to connect/disconnect the output to/from the first switch, a fourth switch coupled between the amplifier and the first switch to bypass the amplifier, and circuitry. The circuitry turns on the first switch and the second switch to initiate charging the capacitor, turns on the fourth switch and turns off the third switch to complete the charging, and turns off the second switch and the first switch to control the ADC to convert the output to a digital signal.