Bufferless Switch Fabric Sequencing for Data Flow Control
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Solution Overview
Problem
Current data stream switch architectures face challenges with scale limitations due to the need for large buffers and complex processing procedures, leading to increased delay jitter and potential packet loss, especially when multiple ingress ports send data to the same egress port simultaneously.
Innovation Solution
A method that calculates a bandwidth map based on bandwidth demand information and performs sequencing to ensure no more than two ingress ports send data to the same egress port at the same time slot, eliminating the need for data and control switching matrices and reducing buffer requirements, thereby simplifying the switch fabric and ensuring fair resource distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If large buffers are used to store VOQs and OQs in ingress end and egress end, then the switch can handle more data traffic, but the device complexity and cost increase significantly
Solution Approach 1:
The patent extracts and eliminates the need for large buffers (VOQs and OQs) in both ingress and egress ends by introducing a bufferless switching architecture. The sequencing matrix performs all necessary buffering and sequencing operations, allowing data to be switched without requiring extensive buffer storage at traditional locations.
Solution Approach 2:
The patent introduces a sequencing matrix as an intermediary component between the data switching matrix and egress ports. This sequencing matrix acts as a mediator that handles sequencing and buffering operations, eliminating the need for buffers at the ingress and egress ends while maintaining proper data flow control.
2Productivity
If two switching matrixes (data switching matrix and control switching matrix) are prepared in the SF, then data and control information can be switched simultaneously, but the device complexity increases
Solution Approach 1:
The patent merges the functions of data switching and control switching into a single switching matrix. The sequencing matrix handles both data packet sequencing and control information routing, eliminating the need for separate control switching matrix while maintaining simultaneous data and control operations through time-division multiplexing.
Solution Approach 2:
The sequencing matrix is designed with multi-functionality, serving both as a data switching component and a control information routing component. This universal component performs sequencing for data packets while also handling control plane information, reducing the overall number of specialized components needed.
3Adaptability or versatility
If the ingress end and egress end exchange messages through the SF to determine whether data switch is allowed, then the switching control is flexible, but the processing procedure becomes too complicated
Solution Approach 1:
The patent performs preliminary sequencing and authorization operations in the sequencing matrix before data reaches the egress end. By pre-processing and pre-authorizing data flow in the sequencing stage, the need for complex message exchange and authorization checks between ingress and egress ends is eliminated, simplifying the overall switching procedure.
4Productivity
If multiple ingress ports send data to the same egress port at the same time, then the data throughput increases, but the egress port becomes blocked
Solution Approach 1:
The patent implements periodic time-division multiplexing in the sequencing matrix, where data from multiple ingress ports is sequenced and transmitted to the same egress port in alternating time slots. This periodic action ensures that only one ingress port sends data to a specific egress port at any given time, preventing blocking while maintaining high overall throughput through efficient time utilization.
Data Source
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Figure 3-a~3-b
AI summary
Embodiments of the present invention disclose a method for controlling data stream switch and a relevant equipment. The method for controlling data stream switch includes: obtaining bandwidth demand information of a data stream; calculating a BWM according to the bandwidth demand information, the physical bandwidth of at least one ingress port corresponding to the bandwidth demand information, the physical bandwidth of at least one egress port of the data stream corresponding to the bandwidth demand information, and time division multiplexing TDM service bandwidth information; performing, according to a preset sequencing criterion, sequencing processing on entries of the BWM obtained through calculation, to obtain a bandwidth sequencing information table; performing cell even sequencing processing on the data stream according to the bandwidth sequencing information table, to obtain a cell table; and controlling, by an input end of a switch equipment, sending of cells of the data stream according to the cell table. Through the technical solutions provided by the embodiments of the present invention, processing complexity of a switch fabric of the switch equipment may be effectively reduced, the problem of scale limitation on a bufferless switch structure is solved, and meanwhile, a delay jitter during switch processing is also decreased.