Bug Positioning System for Post-Silicon Validation
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Solution Overview
Problem
Post-silicon validation of complex digital designs is challenging due to limited observability and controllability, making it difficult to diagnose inconsistent bugs that manifest differently across multiple test runs, especially in environments with asynchronous clock domains and varying environmental conditions.
Innovation Solution
The Bug Positioning System (BPS) uses a statistical approach to localize bugs in space and time by recording compact signal activity encodings with on-chip hardware and analyzing them with software to discern the exact location and time of bug manifestation, minimizing off-chip data transfer and engineering effort.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional post-silicon validation methods are used, then debugging can be performed on silicon prototypes, but the limited observability and controllability make it difficult to diagnose inconsistent bugs
Solution Approach 1:
The patent applies preliminary action by recording signal activity data during normal test execution before debugging is needed. The system continuously captures and stores signal states in buffers during regular operation, so when a bug is detected, the data is already recorded and ready for analysis, eliminating the need for complex real-time observation during debugging
Solution Approach 2:
The patent creates copies of signal activity data by recording and storing states in buffers. Instead of directly observing original signals during debugging, the system analyzes recorded copies of signal activity, which preserves the original system operation while providing detailed observation capabilities for post-analysis
2Measurement precision
If more signals are observed to improve bug diagnosis, then better localization is achieved, but off-chip data transfer time increases
Solution Approach 1:
The patent extracts only the necessary signal activity data that is relevant to bug diagnosis. The system selectively records and transfers specific signal states and activity patterns rather than all possible data, minimizing transfer volume while maintaining diagnostic precision through intelligent data selection
Solution Approach 2:
The system performs preliminary data processing and filtering on-chip before transfer, preparing and condensing signal activity data in advance. This preliminary action reduces the volume of data requiring off-chip transfer while preserving the essential diagnostic information needed for precise bug localization
3Reliability
If deterministic replay mechanisms are used to aid debugging, then non-deterministic failures can be reproduced, but hardware overhead and performance degradation occur
Solution Approach 1:
Instead of implementing complex deterministic replay hardware, the patent creates copies of the actual signal activity data that occurred during test execution. These recorded data copies are analyzed offline to reproduce and diagnose failures without requiring the original system state or complex replay mechanisms, thereby avoiding significant hardware overhead
4Extent of automation
If formal verification techniques are used to automate failure diagnosis, then deterministic execution is achieved, but these methods cannot handle industrial size designs
Solution Approach 1:
The patent enables the system to diagnose its own failures through automated analysis of recorded signal activity data. The system captures its own operational data and uses algorithms to automatically identify bug locations and causes, providing self-service debugging that scales to industrial-sized designs without requiring external formal verification infrastructure
Solution Approach 2:
The patent replaces complex mechanical/formal verification systems with a software-based analysis approach. Instead of using resource-intensive formal verification methods, the system uses recorded data and algorithmic analysis to achieve automated failure diagnosis, substituting the mechanical verification process with a more scalable computational approach
Data Source
AI summary
The system and method described herein relate to a bug positioning system for post-silicon validation of a prototype integrated circuit using statistical analysis. Specifically, the bug positioning system samples output and intermediate signals from a prototype chip to generate signatures. Signatures are grouped into passing and failing groups, modeled, and compared to identify patterns of acceptable behavior and unacceptable behavior and locate bugs in space and time.