Component Built-in Board Stacked Core Layers
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Solution Overview
Problem
The challenge is to develop a semiconductor integrated circuit device and manufacturing method that maintains excellent wiring capability and electric characteristics even when the thickness of a component built-in board is increased, particularly for applications where a thicker board is required to prevent warpage, such as in vehicles, while ensuring accurate mounting of electronic components.
Innovation Solution
A semiconductor integrated circuit device is designed with a component built-in board configuration that includes multiple core layers with cavities for electronic component mounting, an adhesive layer for bonding, and a wiring layer for electrical connections, allowing for increased thickness while maintaining high accuracy and electrical connectivity through the use of stacked metal wiring layers and external connection terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the thickness of the component built-in board is increased to prevent warpage, then the board strength and warpage resistance are improved, but the wiring capability and electric characteristics deteriorate
Solution Approach 1:
The patent transitions from single-surface electrical connections to three-dimensional connections by forming through-electrodes that penetrate the board thickness direction. This allows electrical signals to be transmitted through the increased board thickness without significant signal degradation, effectively resolving the contradiction between board strength (requiring increased thickness) and wiring capability (deteriorating with thickness).
2Strength
If the thickness of the component built-in board is increased to prevent warpage, then the board strength and warpage resistance are improved, but the electrical characteristics deteriorate
Solution Approach 1:
The patent implements vertical stacking of multiple core layers with through-electrodes connecting them, transforming the electrical connection structure from planar to three-dimensional. This dimensional change allows signals to bypass the increased thickness path by utilizing vertical connections, thereby maintaining excellent electric characteristics even when board thickness is increased for warpage prevention.
Solution Approach 2:
The patent embeds multiple core layers within each other in a stacked configuration, with through-electrodes penetrating through multiple layers. This nested structure allows electrical connections to be established through the interior of the board rather than along the surface, maintaining signal integrity despite increased overall board thickness.
3Adaptability or versatility
If the number of electronic components to be mounted on one principal surface is increased, then the board functionality is improved, but the mounting accuracy deteriorates due to increased cavity depth
Solution Approach 1:
The patent divides the board into multiple core layers, each capable of mounting electronic components. By segmenting the mounting surfaces across different layers rather than concentrating all components on a single surface, the cavity depth for each layer remains manageable, thereby maintaining high mounting accuracy while achieving enhanced board functionality.
Solution Approach 2:
The patent utilizes the thickness dimension by stacking multiple core layers vertically. This allows electronic components to be distributed across multiple levels in the thickness direction, reducing the depth of individual cavities and improving mounting accuracy, while simultaneously increasing the overall functionality of the board.
Data Source
AI summary
A semiconductor integrated circuit device includes a component built-in board in which at least a first core layer on which a first electronic component is mounted, a second core layer on which a second electronic component is mounted, an adhesive layer arranged between the first core layer and the second core layer, and wiring layers are stacked; a third electronic component mounted in a first core layer side of the component built-in board and electrically connected to the at least one of the first and second electronic components through the wiring layers; and an external connection terminal formed in a second core layer side of the component built-in board and electrically connected to at least one of the first and second electronic components.


