Built-in Self-Test Circuit for Semiconductor Memory Devices
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Solution Overview
Problem
Conventional built-in self-test circuits for semiconductor devices have limited test coverage as they cannot perform tests for all commands, and external stand-alone testing methods are ineffective for memory devices without access points, leading to incomplete analysis of semiconductor functionality.
Innovation Solution
A semiconductor device with a built-in self-test circuit that includes a command storage unit, input/output control unit, and command decoder unit, allowing it to recognize and execute sequences of all commands without an external controller, thereby improving test coverage and reducing the need for external control during testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If external stand-alone machine type test devices are used, then testing can be performed on devices with access points, but memory devices without pad or similar means of access cannot be tested
Solution Approach 1:
The patent combines the test controller and test commands into the memory device itself by integrating a command storage unit and command decoder unit within the memory device. This merging eliminates the need for external stand-alone test equipment, enabling testing of memory devices without access points while reducing external controller requirements.
Solution Approach 2:
The memory device performs self-testing through built-in self-test circuits that include command storage and decoding functionality integrated within the device. The device tests itself using internal resources rather than requiring external testing equipment, achieving self-service capability for comprehensive command testing.
2Productivity
If conventional built-in self-test circuit is used, then device integration is achieved, but test coverage is low as test for all commands cannot be performed
Solution Approach 1:
The command storage unit is designed to store multiple different command sequences, enabling the built-in self-test circuit to perform comprehensive testing of all commands. This multi-functional capability allows a single integrated circuit to test various command types (read, write, erase, etc.) achieving full command coverage without requiring separate test circuits for each command type.
Solution Approach 2:
The command storage unit pre-stores multiple command sequences before testing begins. By preparing all necessary test commands in advance within the built-in storage, the circuit can systematically execute comprehensive tests without requiring external command input during testing, thereby achieving complete command coverage through preliminary preparation.
3Reliability
If multiple testing methods are used to verify normal memory device operation, then different aspects are covered, but results may differ and functionality analysis may be incomplete
Solution Approach 1:
The built-in self-test circuit segments testing into distinct command types (read, write, erase, etc.) with dedicated test routines for each. The command decoder unit decodes different command sequences separately, allowing systematic verification of each command type's functionality. This segmentation enables comprehensive and accurate functionality analysis by methodically testing each aspect independently.
Solution Approach 2:
The built-in self-test circuit incorporates feedback mechanisms that monitor test results and compare them against expected outcomes. By implementing feedback loops within the integrated circuit, the system can accurately determine whether each command executes correctly, ensuring reliable functionality analysis through systematic verification and result comparison.
Data Source
AI summary
A built-in self-test circuit includes a command storage unit that stores commands inputted from an external device, an input/output control unit that controls the command storage unit to sequentially store the commands and sequentially output stored commands as internal commands in a test operation, and a command decoder unit that decodes the internal commands outputted from the command storage unit and outputs a test command.