Built-in Self-Test Circuitry for Memory Modules
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Solution Overview
Problem
Existing BIST approaches for memory devices require multiple instances of BIST circuitry, leading to increased die sizes and resource consumption, and are costly when using firmware for testing.
Innovation Solution
A single instance of BIST circuitry within a controller can perform self-test operations on multiple memory devices, reducing die sizes and resource consumption while eliminating the costs associated with firmware-based testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple instances of BIST circuitry are used for each memory device, then testing reliability is improved, but die size and resource consumption increase
Solution Approach 1:
The patent consolidates BIST functionality into a single shared circuit instance that serves multiple memory devices through time-multiplexed operation. The BIST circuit is coupled to a memory module containing multiple memory devices and performs self-test operations on different devices at different time intervals, eliminating the need for separate BIST circuitry for each memory device while maintaining comprehensive testing coverage
Solution Approach 2:
The single BIST circuit is designed with universal functionality to test multiple different memory devices. By implementing time-multiplexed operation where the same circuit sequentially tests different memory devices, the system achieves multi-functionality without requiring multiple specialized circuit instances, thereby reducing overall die size while preserving testing reliability
2Reliability
If multiple instances of BIST circuitry are used for each memory device, then testing coverage is improved, but resource consumption increases
Solution Approach 1:
The patent merges multiple BIST circuit instances into a single shared resource that is time-multiplexed across multiple memory devices. This consolidation reduces the total quantity of circuit resources required while maintaining comprehensive testing coverage by systematically testing each memory device in sequence through the shared BIST circuit
Solution Approach 2:
The BIST circuit operates dynamically by switching its testing target between different memory devices based on time-multiplexed control signals. This dynamic allocation of the single BIST circuit to multiple devices allows comprehensive testing coverage to be achieved with minimal resource consumption, as the circuit adapts its operation to test different devices at different time intervals
3Adaptability or versatility
If firmware is used for BIST operations, then testing flexibility is improved, but cost increases significantly
Solution Approach 1:
The patent replaces firmware-based BIST operations with dedicated hardware circuitry implemented in silicon. This substitution eliminates the need for costly firmware licensing and development while providing equivalent or superior testing flexibility through hardwired control logic and time-multiplexed operation, significantly reducing manufacturing costs without sacrificing adaptability
Data Source
AI summary
Methods, systems, and devices related to built-in self-test (BIST) circuitry of a controller. The controller can be coupled to multiple memory devices. The BIST circuitry can include registers configured to store burst patterns. The BIST circuitry can perform a BIST operation on the memory devices contemporaneously and using the number of burst patterns.