Bulk CMOS RF Switch Topology for Higher Power Handling
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Solution Overview
Problem
Bulk CMOS RF switches face limitations in power handling capabilities due to low bulk-to-substrate impedance and forward biasing of diodes during voltage swings, which degrades transmission efficiency and increases insertion loss.
Innovation Solution
Incorporating a deep n-well transistor with DC reverse-biased diodes and optimizing the RF switch topology by adding series and parallel capacitors and an inductor to enhance impedance matching and voltage division, allowing for higher power handling while maintaining low insertion loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If deep n-well transistor is used to increase bulk-to-substrate impedance, then power handling capability is improved, but diodes still become forward-biased at large voltage swings
Solution Approach 1:
The patent segments the bulk CMOS substrate into multiple isolated wells (n-wells and p-wells) that are electrically separated. This segmentation creates independent impedance paths for each well, preventing the forward biasing of diodes between wells while maintaining high bulk-to-substrate impedance. Each well can handle voltage swings independently without triggering parasitic diodes.
Solution Approach 2:
The patent introduces deep n-well and p-well structures as intermediary layers between the active transistor regions and the substrate. These intermediary wells act as voltage buffers that isolate the substrate from large voltage swings at the transistor terminals, preventing diode forward biasing while maintaining high impedance.
2Loss of energy
If larger sized switch transistor is used to optimize insertion loss, then insertion loss is reduced, but impedance from body to substrate is reduced
Solution Approach 1:
The patent moves the impedance enhancement from the horizontal plane (transistor size) to the vertical dimension by implementing deep n-well and p-well structures that extend into the substrate. This vertical dimensionality allows maintaining small transistor sizes for low insertion loss while achieving high bulk-to-substrate impedance through the deep well structures.
Solution Approach 2:
The patent changes the physical parameters of the well structures by increasing their depth and adjusting their doping concentrations. The deep wells extend further into the substrate with optimized doping profiles, which increases the bulk-to-substrate impedance without requiring larger transistor dimensions, thus maintaining low insertion loss.
3Ease of manufacture
If bulk CMOS technology is used for low cost, then manufacturing cost is reduced, but power handling capabilities are worse
Solution Approach 1:
The patent makes the bulk CMOS process multi-functional by implementing a universal deep n-well/p-well structure that simultaneously achieves low cost manufacturing (using standard bulk CMOS process) and enhanced power handling capability (through high bulk-to-substrate impedance). This universal structure can be applied to all switches in the bulk CMOS process without requiring additional process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly improves power handling capabilities and maintains high off-state resistance, extending the maximum voltage swing and reducing insertion loss, thereby enhancing the overall efficiency of RF switches in bulk CMOS technology.
Implementation Method 1
a deep n-well transistor with DC reverse-biased diodes
Implementation Method 2
optimizing the RF switch topology by adding series and parallel capacitors and an inductor to enhance impedance matching
Implementation Method 3
allowing for higher power handling while maintaining low insertion loss
Data Source
AI summary
A single-pole single-throw (SPST) radio frequency (RF) switch is provided that includes one or more switches stacked in series, and a first capacitor disposed at an input side of the SPST RF switch, in series, before the one or more switches. The SPST RF switch also includes a second capacitor disposed, in parallel, across the one or more switches, and an inductor disposed at an output side of the SPST RF switch, in series, after the one or more switches.