Bulk Silicon Bipolar Transistor Junction Isolation via Single Photomask
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Solution Overview
Problem
The high cost and increased complexity associated with additional photomasking steps in bulk silicon processes for junction-isolating bipolar transistors from the substrate, which is a barrier for cost-sensitive applications when transitioning from silicon on insulator (SOI) processes.
Innovation Solution
A method for fabricating integrated semiconductor structures in bulk semiconductor wafers where complementary bipolar transistors are junction-isolated without requiring additional photomasking steps by forming doped buried regions and tank regions of specific dopant types in a single photomasking step, reducing the need for extra masking steps and minimizing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional photomasking steps are used to junction-isolate bipolar transistors from the substrate in bulk silicon processes, then isolation performance is improved, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent combines the formation of the isolation tank region with the formation of the collector region into a single photomasking step. By using the same mask pattern for both doping operations, the process eliminates the need for separate photomasking steps, thereby reducing process complexity while maintaining effective junction isolation between the bipolar transistor and the substrate
2Reliability
If additional photomasking steps are used to junction-isolate bipolar transistors from the substrate in bulk silicon processes, then isolation performance is improved, but manufacturing cost increases
Solution Approach 1:
The patent merges the isolation tank formation with the collector region formation in one photomasking step. This consolidation reduces the number of photomasking steps required, directly lowering manufacturing costs while still achieving the necessary junction isolation performance for reliable bipolar transistor operation
3Reliability
If SOI substrates are used for complementary bipolar transistors, then isolation performance and packing density are improved, but substrate cost increases
Solution Approach 1:
The patent employs a disposable-like approach by forming the isolation function through a single photomasking step that creates both the collector and tank regions. This eliminates the need for expensive SOI substrates, allowing the use of cheaper bulk silicon substrates while still achieving effective isolation through the cleverly designed doping process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for cost-effective fabrication of junction-isolated complementary bipolar transistors on bulk semiconductor substrates, reducing process complexity and maintaining high performance without the added expense of additional photomasking steps.
Implementation Method 1
forming a doped buried region underneath the collector of the first transistor structure and a doped tank region of opposite dopant type underneath the buried region in a same first photomasking step
Data Source
AI summary
An integrated semiconductor structure that has first and second bipolar transistor structures. The first bipolar transistor structure has a doped tank region in contact with a doped tank region located underneath a contacting sinker. The second bipolar transistor structure has a doped buried region that is the same dopant type as its doped tank region. A method for fabricating an integrated semiconductor structure in a bulk semiconductor wafer. A first patterned photomask is used to form a doped buried region and a doped tank region within the first bipolar transistor structure. A second patterned photomask is used to form a doped buried region and a doped tank region within the second bipolar transistor, plus a doped buried region and a doped tank region underneath a contacting sinker adjacent to the first bipolar transistor.