Bulk Silicon Optical Waveguide Trench Integration
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Solution Overview
Problem
Conventional optical devices, such as optical waveguides and couplers, are expensive and cannot be fully integrated with other circuitry on silicon-on-insulator (SOI) substrates, leading to larger, more complex, and costly memory devices and systems with high power consumption.
Innovation Solution
The integration of optical waveguides and couplers into bulk semiconductor substrates, using trenches and cladding layers, allows for the formation of optical devices with reduced leakage loss and efficient integration with other circuitry, enabling smaller, faster, and lower power consumption memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If optical devices are formed on silicon-on-insulator (SOI) substrates, then optical waveguides and couplers can be formed with proper cladding layers, but the substrate cost increases considerably and full integration with other circuitry cannot be realized
Solution Approach 1:
The patent merges optical device fabrication with standard bulk CMOS manufacturing processes. Optical waveguides and couplers are formed directly on bulk CMOS substrates using the same fabrication steps as electronic circuitry, enabling full integration without requiring separate SOI substrates or additional processing steps.
Solution Approach 2:
The patent creates a universal substrate platform that supports both optical and electronic circuitry fabrication. Bulk CMOS substrates serve dual purposes as the base for both electronic devices and optical devices, eliminating the need for separate SOI substrates and enabling monolithic integration.
2Ease of manufacture
If optical devices are formed as separate devices on separate chips, then manufacturing is simplified, but device size and system complexity increase
Solution Approach 1:
The patent combines optical devices and electronic circuitry into a single monolithic chip structure. Both types of devices are fabricated simultaneously on the same bulk CMOS substrate, eliminating the need for separate chips and interconnection packages, thereby reducing overall system size and complexity.
3Reliability
If conventional integrated optical devices are formed on SOI substrates, then optical performance is achieved, but power consumption increases and cost efficiency decreases
Solution Approach 1:
The patent changes the substrate parameter from SOI to bulk CMOS, which fundamentally alters the manufacturing cost structure and power consumption characteristics. Bulk CMOS substrates enable lower operating power and higher cost efficiency while maintaining optical device performance through proper waveguide design and cladding structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of smaller, faster, and more cost-effective memory devices with integrated optical interconnection systems, reducing size and power consumption while facilitating integration with other circuitry on a single chip or wafer.
Implementation Method 1
A waveguide core material, such as amorphous silicon, having a higher index of refraction than that of the lower cladding layer, is formed on the lower cladding layer. An upper cladding layer, such as a layer of material having a lower index of refraction than that of the core layer, may be formed over and/or around the core layer
Data Source
AI summary
Optical waveguide and coupler devices and methods include a trench formed in a bulk semiconductor substrate, for example, a bulk silicon substrate. A bottom cladding layer is formed in the trench, and a core region is formed on the bottom cladding layer. A reflective element, such as a distributed Bragg reflector can be formed under the coupler device and/or the waveguide device. Because the optical devices are integrated in a bulk substrate, they can be readily integrated with other devices on a chip or die in accordance with silicon photonics technology. Specifically, for example, the optical devices can be integrated in a DRAM memory circuit chip die.