Semiconductor Bump Buffer Layer for Thermal Stress Absorption
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Solution Overview
Problem
Semiconductor packages with bump structures face thermal stress issues due to different coefficients of thermal expansion (CTEs) in multi-layer materials, leading to bending and cracking of chips during the reflow process.
Innovation Solution
A bump structure is designed with a first buffer layer between the under bump metallurgy (UBM) and the dielectric layer, where the buffer layer has a lower Young's modulus than the dielectric layer, effectively absorbing thermal stress and preventing cracks by increasing the junction area and thickness to enhance bonding strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a multi-layer bump structure is used to provide good conductivity, then electrical performance is improved, but thermal stress causes bending and cracking of the chip
Solution Approach 1:
A buffer layer is introduced as an intermediary component between the UBM and the dielectric layer. This buffer layer has different mechanical properties (lower Young's modulus, higher elongation) than the surrounding layers, allowing it to absorb and distribute thermal stresses. The buffer layer acts as a stress mediator that prevents stress concentration at the UBM-dielectric interface, thereby preventing chip bending and cracking while maintaining the multi-layer bump structure's electrical conductivity function.
Solution Approach 2:
The invention changes the mechanical parameters of the buffer layer specifically - using a material with lower Young's modulus and higher elongation compared to the dielectric layer. This parameter change allows the buffer layer to be more compliant and better at absorbing thermal expansion differences between layers during temperature cycling, reducing the overall thermal stress on the chip structure.
2Length of moving object
If the chip thickness is decreased to achieve smaller package size, then miniaturization is improved, but the chip becomes more susceptible to bending and cracking from thermal stress
Solution Approach 1:
The buffer layer is positioned beforehand between the UBM and dielectric layer to provide cushioning against thermal stress before the stress can cause damage. This pre-positioned cushioning layer absorbs the thermal expansion differences that occur during reflow and temperature cycling, protecting the thinned chip from bending and cracking that would otherwise occur due to its reduced thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buffer layer absorbs thermal stress generated during bonding, preventing cracks in the semiconductor package and ensuring the integrity of the chip's circuit layer.
Implementation Method 1
the first buffer layer effectively absorbs thermal stress generated during the bonding step due to the different CTEs of the multi-layer materials of the bump structure
Data Source
AI summary
The semiconductor package has a metal layer, a first dielectric layer formed on a metal layer, and an opening formed through the first dielectric layer to expose a part of the metal layer. The bump structure has an under bump metallurgy (hereinafter UBM), a first buffer layer and a metal bump. The UBM is formed on the first part of the metal layer, a sidewall of the opening and a top surface of the first dielectric layer. The first buffer layer is formed between a part of the UBM corresponding to the top surface of the first dielectric layer and the top surface of the first dielectric layer. The metal bump is formed on the UBM. Therefore, the first buffer layer effectively absorbs a thermal stress to avoid cracks generated in the bump structure after the bonding step.