Power Distribution Bump Capacitor Layout for Reference Voltage Noise
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Solution Overview
Problem
In high-frequency applications like 5G, reference voltage signals generate noise, leading to poor dynamic performance of chips due to simultaneous switching noises and inductance variations.
Innovation Solution
A power distribution system with capacitors disposed close to bumps on a substrate to reduce noise by coupling to the bumps, improving dynamic performance of chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reference voltage signals are transmitted through bumps to the chip, then the chip can receive the reference voltage signals for dynamic operations, but simultaneous switching noises and inductance variations generate noise in high frequency applications
Solution Approach 1:
A capacitor is introduced as an intermediary component between the bumps and the chip. The capacitor couples to the bumps and provides a noise filtering function, allowing the reference voltage signal to pass through while blocking the noise generated by simultaneous switching and inductance variations.
Solution Approach 2:
The noise component is extracted and separated from the reference voltage signal through the capacitor's filtering action. The capacitor removes the harmful noise elements (simultaneous switching noises and inductance variations) while preserving the useful reference voltage signal for the chip.
2Object-affected harmful factors
If capacitors are disposed close to bumps on substrate, then noise is reduced by coupling to the bumps, but device complexity increases
Solution Approach 1:
The capacitor is placed locally at specific positions close to the bumps on the substrate, where the noise coupling is most effective. This localized placement provides noise reduction precisely where needed without requiring complex system-wide modifications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The capacitors effectively reduce noise in reference voltage signals, enhancing the dynamic performance of chips by minimizing noise interference.
Implementation Method 1
a first capacitor is located above the substrate and under the first chip, a first terminal of the first capacitor being coupled to the first bump, a second terminal of the first capacitor being coupled to the second bump
Implementation Method 2
The capacitors effectively reduce noise in reference voltage signals, enhancing the dynamic performance of chips by minimizing noise interference
Data Source
AI summary
A power distribution device includes a substrate, a first chip, a first bump, a second bump and a first capacitor. The first chip is configured to receive a first reference voltage signal and a second reference voltage signal. The first bump is located between the substrate and the first chip, and configured to transmit the first reference voltage signal from the substrate to the first chip. The second bump is located between the substrate and the first chip, and configured to transmit the second reference voltage signal from the substrate to the first chip. The first capacitor is located above the substrate and below the first chip. A first terminal of the first capacitor is coupled to the first bump, and a second terminal of the first capacitor is coupled to the second bump. A power distribution system is also disclosed herein.