Bump-Containing Bit Lines for 3D Memory Connectivity
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently forming bump-containing bit lines that protrude upward from the surface, which is crucial for effective electrical connectivity and memory operation, due to limitations in existing manufacturing methods.
Innovation Solution
A method involving the formation of an alternating stack of insulating and conductive layers, where memory stack structures with vertical semiconductor channels and memory films are created, followed by the formation of conductive via structures and bit lines. The bit lines are converted into bump-containing bit lines through an anisotropic etch process, with a line portion and a bump portion that protrudes upward, and bit line contact via structures are formed to contact the bump portion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional manufacturing methods are used to form bit lines, then the manufacturing process is simpler, but electrical connectivity and memory operation effectiveness are insufficient
Solution Approach 1:
The bit line structure transitions from a conventional planar configuration to a three-dimensional bump-containing structure that protrudes upward from the surface. This dimensional change enables effective electrical connectivity by establishing vertical contact paths through the bump portions, while the manufacturing complexity is managed through integrated formation processes that combine multiple steps into unified operations.
2Reliability
If bit lines are formed without bump structures, then the manufacturing process is easier, but electrical shorts may occur and performance is reduced
Solution Approach 1:
The bit line structure incorporates localized bump portions at specific locations where electrical connectivity is required, rather than uniformly complexifying the entire bit line structure. The bump portions are formed only in areas needing enhanced contact, while other portions maintain simpler geometries, thus improving reliability without excessive device complexity.
3Shape
If anisotropic etch process is used to create bump portions, then protruding bit line structures are achieved, but manufacturing precision requirements increase
Solution Approach 1:
The anisotropic etch process is applied to bit line materials that have been pre-formed with specific layer configurations and protective coatings. The preliminary formation of these structures provides built-in guidance and protection that constrain the etch process, reducing the precision burden on the etching step itself while still achieving the desired bump portion geometries.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of effective bump-containing bit lines that enhance electrical connectivity and memory operation, reducing the likelihood of electrical shorts and improving the overall performance of three-dimensional memory devices.
Implementation Method 1
vertically recessing portions of the bit lines that are not masked by the patterned mask material portions by performing an anisotropic etch process
Data Source
AI summary
A semiconductor die can include an alternating stack of insulating layers and electrically conductive layers located on a substrate, memory stack structures extending through the alternating stack, drain regions located at a first end of a respective one of the vertical semiconductor channels of a memory stack structure, and bit lines extending over the drain regions and electrically connected to a respective subset of the drain regions. At least of a subset of the bit lines includes bump-containing bit lines. Each of the bump-containing bit lines includes a line portion and a bump portion that protrudes upward from a top surface of the line portion by a bump height. Bit line contact via structures overlie the bit lines and contact a bump portion of a respective one of the bump-containing bit lines.