Bridge Chip Packaging Without Extra Bumps for Dense Chip Interconnects

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Solution Overview

Problem

The challenge in the field of package devices is to enhance interconnection efficiency between active chips while reducing manufacturing cost and process complexity, particularly as the demand for higher computing power and integrated functions increases.

Innovation Solution

A package device comprising a substrate, conductive pillars, a bridge chip, a photosensitive encapsulation layer, a redistribution layer, and active chips, where the bridge chip is coupled between the active chips, and the redistribution layer facilitates efficient interconnection without the need for additional bumps on the bridge chip, reducing manufacturing complexity and cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple active chips are encapsulated in the same package device to integrate various functions, then the functional integration is improved, but the interconnection efficiency between active chips deteriorates due to complex interconnection structures

Engineering Contradiction:
Improvefunctional integrationVSAvoidinterconnection efficiency
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A bridge chip is introduced as an intermediary component between multiple active chips to facilitate interconnection. The bridge chip includes a first surface facing the active chips and a second surface opposite to the first surface, serving as a mediator that improves signal transmission efficiency while enabling functional integration of multiple chips in the same package device.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If additional bumps are added on the bridge chip to improve interconnection, then the interconnection efficiency is improved, but the manufacturing complexity and cost increase

Engineering Contradiction:
Improveinterconnection efficiencyVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the bump structure from the bridge chip design. Instead of adding bumps on the bridge chip, the invention uses a photosensitive encapsulation layer that directly encapsulates the bridge chip and conductive pillars, eliminating the need for additional bumps and reducing manufacturing complexity while maintaining interconnection efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The photosensitive encapsulation layer serves multiple functions: it encapsulates the bridge chip and conductive pillars, provides structural support, and enables interconnection between active chips without requiring separate bump structures. This multi-functional approach simplifies the overall device structure and manufacturing process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Stability of the object's composition

If the photosensitive encapsulation layer is formed to surround the bridge chip and conductive pillars, then the structural integrity is improved, but the manufacturing precision requirements increase due to the complex surrounding structure

Engineering Contradiction:
Improvestructural integrityVSAvoidencapsulation precision
Core Design Contradiction:
Stability of the object's compositionVSManufacturing precision

Solution Approach 1:

The patent utilizes the photosensitive property of the encapsulation layer material, allowing it to be cured by light exposure. This parameter change from uncured to cured state enables precise formation of the encapsulation layer surrounding the bridge chip and conductive pillars, achieving both structural integrity and manageable manufacturing precision through photopolymerization process control.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves interconnection density and signal transmission efficiency between active chips, simplifies the manufacturing process, and lowers costs by eliminating the need for extra bumps and reducing the number of layers in the redistribution layer, thereby enhancing overall package device performance.

Implementation Method 1

a photosensitive encapsulation layer is formed on the conductive pillars and the bridge chip

Methodology Applied
Scientific EffectPhotopolymerization: Photopolymerisation

Data Source

PatentUS20230290730A1Package device and manufacturing method thereof
Publication Date: 2023.09.14 POWERTECH TECHNOLOGY INC
  • US20230290730A1 patent drawing
  • US20230290730A1 patent drawing
  • US20230290730A1 patent drawing

AI summary

A package device and a manufacturing method thereof are provided. The package device includes a substrate, a plurality of conductive pillars, at least one bridge chip, a photosensitive encapsulation layer, a redistribution layer, and at least two active chips. The conductive pillars and the bridge chip are disposed on the substrate. The photosensitive encapsulation layer surrounds the bridge chip and the conductive pillars, in which a distance between a top surface of the bridge chip and a top surface of the photosensitive encapsulation layer is less than a distance between a top surface of one of the conductive pillars and the top surface of the photosensitive encapsulation layer. The redistribution layer is disposed on the photosensitive encapsulation layer, the active chips are disposed on the redistribution layer, and the bridge chip is coupled between the active chips.