Bump-on-Trace Interconnect Sidewall Wetting

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Solution Overview

Problem

Bump-on-trace interconnects with fine pitches face issues with solder not wetting the trace sidewalls during thermal compression bonding, leading to joint integrity and electro-migration problems, which affect the reliability and density of interconnects in packaging systems.

Innovation Solution

The implementation of a sidewall wetting technique where the solder covers more than half the trace height, promoting better solder adhesion and preventing delamination, using conductive materials like copper or gold, and applying active plasma or chemical treatments to enhance sidewall wetting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If fine pitch interconnects are used to increase density, then interconnect density is improved, but solder wetting of trace sidewalls deteriorates

Engineering Contradiction:

Improveinterconnect densityVSAvoidsolder wetting

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent changes the physical-chemical parameters of the trace sidewall surface by applying plasma treatment or chemical etching to increase surface energy and create micro-roughness. This enables solder to wet the sidewalls effectively even at fine pitch dimensions where the trace height is small, thus resolving the contradiction between high density and reliable solder wetting.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces an intermediary layer or surface treatment on the trace sidewall that facilitates solder wetting. The plasma-treated or chemically etched sidewall acts as an intermediary between the solder and the base metal, improving adhesion and wetting characteristics without requiring larger pitch dimensions.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If thermal compression bonding is used to join packages, then manufacturing efficiency is improved, but solder joint integrity deteriorates due to insufficient sidewall wetting

Engineering Contradiction:

Improvemanufacturing efficiencyVSAvoidsolder joint integrity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies plasma treatment or chemical etching to the trace sidewalls before the thermal compression bonding process. This preliminary action prepares the surface to ensure proper solder wetting during the subsequent bonding operation, preventing joint integrity issues while maintaining the efficiency of thermal compression bonding.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent modifies the surface energy and morphology parameters of the trace sidewall through plasma or chemical treatment, creating optimal conditions for solder wetting during thermal compression bonding. This ensures that the rapid bonding process produces reliable joints with adequate sidewall wetting coverage.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If solder coverage on trace sidewalls is increased to improve wetting, then joint reliability is improved, but manufacturing complexity increases

Engineering Contradiction:

Improvejoint reliabilityVSAvoidmanufacturing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses plasma treatment or chemical etching as an intermediary process that modifies the trace sidewall surface to inherently promote solder wetting. This approach achieves improved joint reliability through a controlled surface treatment rather than requiring complex adjustments to the soldering process parameters or additional manufacturing steps.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances joint integrity by reducing trace peeling and cracking, and improves electro-migration performance by creating a stronger, more reliable solder joint with increased surface area contact, allowing for finer pitch assemblies and reduced failure rates.

Implementation Method 1

the solder covers more than half the trace height, promoting better solder adhesion

Methodology Applied

Scientific EffectCapillary action: Capillary Action

Implementation Method 2

applying active plasma or chemical treatments to enhance sidewall wetting

Methodology Applied

Scientific EffectPlasma treatment: Plasma

Implementation Method 3

applying active plasma or chemical treatments to enhance sidewall wetting

Methodology Applied

Scientific EffectChemical treatment: Chemical Bonding

Data Source

PatentUS11682651B2Bump-on-trace interconnect

Publication Date: 2023.06.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Disclosed herein is a bump-on-trace interconnect with a wetted trace sidewall and a method for fabricating the same. A first substrate having conductive bump with solder applied is mounted to a second substrate with a trace disposed thereon by reflowing the solder on the bump so that the solder wets at least one sidewall of the trace, with the solder optionally wetting between at least half and all of the height of the trace sidewall. A plurality of traces and bumps may also be disposed on the first substrate and second substrate with a bump pitch of less than about 100 μm, and volume of solder for application to the bump calculated based on at least one of a joint gap distance, desired solder joint width, predetermined solder joint separation, bump geometry, trace geometry, minimum trace sidewall wetting region height and trace separation distance.