Bump Pad Structure With Recessed Traces For Solder Joint Reliability

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Solution Overview

Problem

Conventional embedded-trace-substrate (ETS) circuit boards face issues with non-conductive paste (NCP) filler entrapment at high-profile bump pads, leading to poor solder joint quality and premature failure of semiconductor devices due to surface roughness caused by the roughing process for solder resist adhesion.

Innovation Solution

A device with a bump pad structure featuring a smooth surface and recessed first and second traces, where the first trace is recessed from the bump pad surface and the second trace is covered with solder resist, reducing surface roughness and preventing NCP filler entrapment, thereby improving solder joint reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the roughing process is applied to the bump pad surface to improve solder resist adhesion, then the adhesion strength is improved, but the surface roughness increases causing NCP filler entrapment

Engineering Contradiction:

Improvesolder resist adhesionVSAvoidsurface roughness

Core Design Contradiction:

StrengthVSManufacturing precision

Solution Approach 1:

The patent applies different surface treatments to different regions: the bump pad surface is kept smooth (Ra ≤ 0.8 μm) to prevent NCP filler entrapment, while the trace surfaces are roughened (Ra ≥ 1.5 μm) to ensure solder resist adhesion. This local differentiation resolves the contradiction by applying the roughing process only where needed for adhesion without affecting the bump pad quality.

Inventive Principle:

Principle #3Local quality

2Reliability

If the bump pad profile is increased to improve solder joint formation, then the solder joint quality is improved, but the NCP filler entrapment increases due to high profile

Engineering Contradiction:

Improvesolder joint qualityVSAvoidNCP filler entrapment

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent controls the bump pad height to be within 0-5 μm from the substrate surface and limits the surface roughness to Ra ≤ 0.8 μm. By optimizing these parameters, the bump pad maintains sufficient profile for reliable solder joint formation while preventing NCP filler entrapment that occurs with higher profiles and rougher surfaces.

Inventive Principle:

Principle #35Parameter changes

3Productivity

If the line density and pin count are increased to improve computing power, then the processing capability is improved, but the solder joint reliability decreases

Engineering Contradiction:

Improveline density and pin countVSAvoidsolder joint reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies differentiated surface treatments: traces are roughened for solder resist adhesion while bump pads remain smooth for reliable solder joints. This local quality approach allows high density interconnects to be implemented without compromising solder joint reliability, as each feature receives the appropriate surface treatment for its function.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS11527498B2Bump pad structure

Publication Date: 2022.12.13 QUALCOMM INC

AI summary

Aspects disclosed herein include a device including a bump pad structure and methods for fabricating the same. The device includes a bump pad. The device also includes a first trace adjacent the bump pad, where a first trace top surface is recessed a first recess distance from a bump pad top surface. The device also includes a second trace adjacent the first trace, covered at least in part by a solder resist. The device also includes a substrate, where the bump pad, the first trace, and the second trace are each formed on a portion of the substrate.