Bump Re-assignment for IC Warpage Yield
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Solution Overview
Problem
The packaging process of integrated circuits can lead to warpage between the die and substrate, resulting in open or short circuits due to uneven distances, which affects normal signal and power transmission.
Innovation Solution
A method of yield prejudgment and bump re-assignment is implemented by calculating warpage probabilities, classifying areas into short-circuit, open-circuit, and successful-connection sets, and re-assigning bumps to ensure adequate power and ground regions meet required values, thereby preventing circuit failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the die is packaged using conventional bump assignment methods, then the packaging process can be completed, but warpage occurs causing open or short circuits due to uneven distances between die and substrate
Solution Approach 1:
The patent performs yield prejudgment and bump re-assignment before the actual packaging process. It calculates warpage probabilities for different areas of the die, identifies short-circuit regions where successful-connection probabilities fall outside predetermined ranges, and re-assigns bumps in advance to avoid open and short circuits caused by warpage during packaging.
Solution Approach 2:
The patent changes the assignment parameters of bumps based on calculated warpage probabilities. By analyzing successful-connection probabilities for each area and adjusting bump assignments accordingly (re-assigning bumps in short-circuit regions), it adapts the bump configuration to compensate for expected warpage effects, thereby maintaining electrical connection reliability despite distance non-uniformity.
2Reliability
If bump assignments are made without considering warpage probabilities, then the design process is simple, but circuit failures occur due to open or short circuits from warpage
Solution Approach 1:
The patent performs yield prejudgment and bump re-assignment before the actual packaging process. It calculates warpage probabilities for different areas of the die, identifies short-circuit regions where successful-connection probabilities fall outside predetermined ranges, and re-assigns bumps in advance to avoid open and short circuits caused by warpage during packaging.
Solution Approach 2:
The patent creates a virtual model of the die with calculated warpage probabilities and successful-connection probabilities for each area. This virtual representation allows simulation and analysis of potential circuit failures before actual manufacturing, enabling bump re-assignment based on predicted performance without requiring physical prototypes or trial packaging.
3Reliability
If areas with low successful-connection probabilities are used for power and ground regions, then power and ground requirements may not be met, but using high probability areas reduces available areas for signal transmission
Solution Approach 1:
The patent applies different quality requirements to different regions of the die. Signal regions are assigned to areas with high successful-connection probabilities to ensure reliable signal transmission, while power and ground regions are assigned to areas with low successful-connection probabilities. This local differentiation optimizes the overall system by matching region requirements with area characteristics.
Solution Approach 2:
The patent segments the die into different functional regions: signal regions, power regions, and ground regions. By dividing the die area and assigning different purposes to different segments based on their warpage probability characteristics, it ensures that signal transmission areas have high connection reliability while power and ground areas can tolerate lower probabilities, thus maximizing the utilization of available areas.
Data Source
AI summary
A method of yield prejudgment and bump re-assignment for a die is provided. The die includes a plurality of areas. Each area is electrically connected to a substrate through a corresponding bump. The successful-connection probability of each area is prejudged. The die is divided into a signal region and a short-circuit region according to the successful-connection probabilities. The positions of the bumps are arranged so that signal bumps are disposed in the signal region and power bumps are disposed in the short region.