Bump Resistivity Measurement via Dedicated Corner Test Structures

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In semiconductor manufacturing, there is a need to test the quality of bump structures and their underlying layers in flip-chip packaging to ensure proper formation and prevent defects, as improper process operations can lead to increased resistivity and potential device damage during measurement.

Innovation Solution

A resistivity testing structure is implemented using designated bumps on the corners of IC chips, which are not connected to active devices, allowing for safe measurement of resistivity without damaging the devices, and utilizing a conductive structure to apply current and measure voltage drop across the bumps and their underlying layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If resistivity measurement is performed on bump structures during manufacturing, then quality control of bump formation process is improved, but risk of device damage during measurement increases

Engineering Contradiction:
Improvequality control of bump formationVSAvoiddevice damage during measurement
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the bump structures into two categories: functional bumps connected to active devices and dedicated test bumps not connected to active devices. The test bumps are specifically designated for resistivity measurement, isolating the measurement function from the functional circuitry. This segmentation allows quality control measurements to be performed on test bumps without risking damage to active devices, as the test bumps are electrically isolated from sensitive circuit elements.

Inventive Principle:
Principle #1Segmentation

2Productivity

If resistivity measurement is performed on bump structures, then process quality monitoring is improved, but measurement precision is compromised due to potential device damage

Engineering Contradiction:
Improveprocess quality monitoringVSAvoidresistivity measurement accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent implements self-service by designing the test structure to be self-contained and self-protecting. The dedicated test bumps with isolated conductive structures provide built-in protection against device damage during measurement. The structure itself serves as both the measurement target and the protection mechanism, eliminating the need for external protective measures and enabling reliable, repeated measurements without degrading measurement precision or risking device integrity.

Inventive Principle:
Principle #25Self-service

3Device complexity

If standard probe cards are used for resistivity measurement, then device complexity is reduced, but measurement capability is insufficient for bump structures

Engineering Contradiction:
Improvemeasurement system simplicityVSAvoidbump resistivity measurement capability
Core Design Contradiction:
Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies preliminary action by pre-configuring the bump structures with dedicated test bumps and isolated conductive structures before the measurement process. These pre-designed test elements are specifically prepared to accommodate standard probe card measurements, eliminating the need for specialized measurement equipment. The preliminary structuring of test bumps with accessible, isolated conductive paths enables conventional probe cards to successfully measure bump resistivity without requiring complex custom measurement systems.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the monitoring of bump formation process quality and reduces the risk of device damage during resistivity testing, allowing for uniform data collection across the wafer and reducing the need for customized probe cards by designating specific bumps for measurement.

Implementation Method 1

utilizing a conductive structure to apply current and measure voltage drop across the bumps and their underlying layers

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS8742776B2Mechanisms for resistivity measurement of bump structures
Publication Date: 2014.06.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8742776B2 patent drawing
  • US8742776B2 patent drawing
  • US8742776B2 patent drawing

AI summary

The embodiments described above provide mechanisms for bump resistivity measurement. By using designated bumps on one or more corners of dies, the resistivity of bumps may be measured without damaging devices and without a customized probing card. In addition, bump resistivity may be collected across the entire wafer. The collected resistivity data may be used to monitor the stability and/or health of processes used to form bumps and their underlying layers.