3D Memory Bump Stack Structures for Overlay Error Measurement
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Solution Overview
Problem
Current methods for manufacturing three-dimensional memory devices face challenges in accurately measuring deformation during the fabrication process, particularly in intra-die overlay monitoring, which can lead to overlay errors between different tiers of the memory device.
Innovation Solution
The use of bump stack structures, including base bump portions, alternating stacks of insulating and electrically conductive layers, and protrusion structures, allows for the measurement of deformation by measuring lateral distances between bump stack structures and protrusion structures, enabling precise intra-die overlay monitoring and compensation for overlay errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional manufacturing methods are used for three-dimensional memory devices, then the fabrication process is simpler, but overlay errors between different tiers occur due to inability to accurately measure deformation
Solution Approach 1:
The bump stack structures are formed in advance during the fabrication process, serving as pre-positioned measurement references. These structures are created before the overlay measurement step, enabling deformation measurement at critical stages of manufacturing without requiring additional complex measurement equipment
Solution Approach 2:
The bump stack structures act as intermediary reference objects between the manufacturing process and the overlay measurement system. By measuring lateral distances between these intermediary structures and protrusion structures, the patent enables indirect measurement of deformation and overlay errors without directly measuring the memory device tiers themselves
2Manufacturing precision
If deformation measurement is not implemented, then the fabrication process is faster, but overlay errors between tiers increase
Solution Approach 1:
The bump stack structures are prepared in advance as measurement references, and the measurement of lateral distances between these structures and protrusion structures is performed at intermediate fabrication stages. This preliminary measurement enables real-time monitoring and compensation of overlay errors without halting the overall fabrication process
Solution Approach 2:
The measurement of lateral distances between bump stack structures and protrusion structures provides feedback information about deformation and overlay errors. This feedback enables adjustment of the lithography process parameters to compensate for detected errors, improving overlay accuracy while maintaining fabrication efficiency through iterative correction
3Measurement precision
If bump stack structures are added for deformation measurement, then overlay errors are reduced, but the device structure becomes more complex
Solution Approach 1:
The bump stack structures serve multiple functions: they act as both structural components of the memory device and as measurement references for overlay monitoring. By integrating measurement functionality into existing structural elements, the patent avoids adding separate dedicated measurement devices that would increase complexity
Solution Approach 2:
The bump stack structures are created as simplified copies or representations of the actual memory device tiers. These structures replicate the positional relationships and deformation characteristics of the real device, enabling measurement without requiring the full complexity of the actual memory structure
Data Source
AI summary
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, pillar structures vertically extending through the alternating stack, bump stack structures including a base bump portion located underneath the alternating stack and a respective subset of the bump portions located in the alternating stack that overlie the base bump portion, and protrusion structures located over the alternating stack and laterally spaced from the bump stack structures. Each of the insulating layers and the electrically conductive layers include a planar portion located between a planar top surface and a planar bottom surface and the bump portions that are adjoined to the planar portion at a respective periphery and having a respective raised top surface that is vertically raised from the planar top surface and a respective raised bottom surface that is raised from the planar bottom surface.